Datasheet

ManualsBrandsST ManualsEmbedded Processors & ControllersMicrocontroller 32bit 1MB LQFP

Functional overview STM32F745xx STM32F746xx

20/227 DocID027590 Rev 4

Each stream is connected to dedicated hardware DMA requests, with support for software

trigger on each stream. Configuration is made by software and transfer sizes between

source and destination are independent.

The DMA can be used with the main peripherals:

• SPI and I

• I

• USART

• General-purpose, basic and advanced-control timers TIMx

• DAC

• SDMMC

• Camera interface (DCMI)

• ADC

• SAI

• SPDIFRX

• Quad-SPI

• HDMI-CEC

2.8 Flexible memory controller (FMC)

The Flexible memory controller (FMC) includes three memory controllers:

• The NOR/PSRAM memory controller

• The NAND/memory controller

• The Synchronous DRAM (SDRAM/Mobile LPSDR SDRAM) controller

The main features of the FMC controller are the following:

• Interface with static-memory mapped devices including:

– Static random access memory (SRAM)

– NOR Flash memory/OneNAND Flash memory

– PSRAM (4 memory banks)

– NAND Flash memory with ECC hardware to check up to 8 Kbytes of data

• Interface with synchronous DRAM (SDRAM/Mobile LPSDR SDRAM) memories

• 8-,16-,32-bit data bus width

• Independent Chip Select control for each memory bank

• Independent configuration for each memory bank

• Write FIFO

• Read FIFO for SDRAM controller

• The Maximum FMC_CLK/FMC_SDCLK frequency for synchronous accesses is

HCLK/2.

LCD parallel interface

The FMC can be configured to interface seamlessly with most graphic LCD controllers. It

supports the Intel 8080 and Motorola 6800 modes, and is flexible enough to adapt to

specific LCD interfaces. This LCD parallel interface capability makes it easy to build cost-

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