Datasheet

Description STM32F745xx STM32F746xx
16/227 DocID027590 Rev 4
Figure 2. STM32F745xx and STM32F746xx block diagram
1. The timers connected to APB2 are clocked from TIMxCLK up to 216 MHz, while the timers connected to APB1 are clocked
from TIMxCLK either up to 108 MHz or 216 MHz depending on TIMPRE bit configuration in the RCC_DCKCFGR register.
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