Datasheet

Electrical characteristics STM32F745xx STM32F746xx
146/227 DocID027590 Rev 4
f
ADC
ADC clock frequency
V
DDA
= 1.7
(1)
to 2.4 V 0.6 15 18 MHz
V
DDA
= 2.4 to 3.6 V 0.6 30 36 MHz
f
TRIG
(2)
External trigger frequency
f
ADC
= 30 MHz,
12-bit resolution
- - 1764 kHz
---171/f
ADC
V
AIN
Conversion voltage range
(3)
-
0
(V
SSA
or V
REF-
tied to ground)
-V
REF+
V
R
AIN
(2)
External input impedance
See Equation 1 for
details
--50kΩ
R
ADC
(2)(4)
Sampling switch resistance - - - 6 kΩ
C
ADC
(2)
Internal sample and hold
capacitor
--47pF
t
lat
(2)
Injection trigger conversion
latency
f
ADC
= 30 MHz - - 0.100 µs
--3
(5)
1/f
ADC
t
latr
(2)
Regular trigger conversion
latency
f
ADC
= 30 MHz - - 0.067 µs
--2
(5)
1/f
ADC
t
S
(2)
Sampling time
f
ADC
= 30 MHz 0.100 - 16 µs
- 3 - 480 1/f
ADC
t
STAB
(2)
Power-up time - - 2 3 µs
t
CONV
(2)
Total conversion time (including
sampling time)
f
ADC
= 30 MHz
12-bit resolution
0.50 - 16.40 µs
f
ADC
= 30 MHz
10-bit resolution
0.43 - 16.34 µs
f
ADC
= 30 MHz
8-bit resolution
0.37 - 16.27 µs
f
ADC
= 30 MHz
6-bit resolution
0.30 - 16.20 µs
9 to 492 (t
S
for sampling +n-bit resolution for successive
approximation)
1/f
ADC
f
S
(2)
Sampling rate
(f
ADC
= 30 MHz, and
t
S
= 3 ADC cycles)
12-bit resolution
Single ADC
- - 2 Msps
12-bit resolution
Interleave Dual ADC
mode
- - 3.75 Msps
12-bit resolution
Interleave Triple ADC
mode
- - 6 Msps
Table 62. ADC characteristics (continued)
Symbol Parameter Conditions Min Typ Max Unit
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