Datasheet
STM32F722xx STM32F723xx Pinouts and pin description
DocID028479 Rev 1 73/121
51 78 111 B14 139 A3 B14 B11 111 139 PC10 I/O FT -
SPI3_SCK/I2S3_CK,
USART3_TX, UART4_TX,
QUADSPI_BK1_IO1,
SDMMC1_D2, EVENTOUT
-
52 79 112 B13 140 C5 B13 B10 112 140 PC11 I/O FT -
SPI3_MISO, USART3_RX,
UART4_RX,
QUADSPI_BK2_NCS,
SDMMC1_D3, EVENTOUT
-
53 80 113 A12 141 D5 A12 C10 113 141 PC12 I/O FT -
TRACED3,
SPI3_MOSI/I2S3_SD,
USART3_CK, UART5_TX,
SDMMC1_CK, EVENTOUT
-
- 81 114 B12 142 B5 B12 E10 114 142 PD0 I/O FT -
CAN1_RX, FMC_D2,
EVENTOUT
-
- 82 115 C12 143 A4 C12 D10 115 143 PD1 I/O FT -
CAN1_TX, FMC_D3,
EVENTOUT
-
54 83 116 D12 144 E5 D12 E9 116 144 PD2 I/O FT -
TRACED2, TIM3_ETR,
UART5_RX, SDMMC1_CMD,
EVENTOUT
-
- 84 117 D11 145 C6 D11 D9 117 145 PD3 I/O FT -
SPI2_SCK/I2S2_CK,
USART2_CTS, FMC_CLK,
EVENTOUT
-
Table 10. STM32F722xx and STM32F723xx pin and ball definition (continued)
Pin Number
Pin name
(function after
reset)
(1)
Pin type
I/O structure
Notes
Alternate functions
Additional
functions
STM32F722xx STM32F723xx
LQFP64
LQFP100
LQFP144
UFBGA176
LQFP176
WLCSP100
UFBGA176
UFBGA144
LQFP144
LQFP176
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