Datasheet

STM32F722xx STM32F723xx Pinouts and pin description
DocID028479 Rev 1 71/121
44 70 103 C15 122 C1 C15 C12 103 122 PA11 I/O FT -
TIM1_CH4, USART1_CTS,
CAN1_RX, OTG_FS_DM,
EVENTOUT
-
45 71 104 B15 123 B2 B15 B12 104 123 PA12 I/O FT -
TIM1_ETR, USART1_RTS,
SAI2_FS_B, CAN1_TX,
OTG_FS_DP, EVENTOUT
-
46 72 105 A15 124 B1 A15 A12 105 124
PA13(JTMS-
SWDIO)
I/O FT - JTMS-SWDIO, EVENTOUT -
- 73 106 F13 125 B3 F13 G9 106 125 VCAP_2 S - - - -
47 74 107 F12 126 A2 F12 G10 107 126 VSS S - - - - 48 75 108 G13 127 A1 G13 F9 108 127 VDD S - - - -
- - - E12 128 - E12 - - 128 PH13 I/O FT -
TIM8_CH1N, UART4_TX,
CAN1_TX, FMC_D21,
EVENTOUT
-
- - - E13 129 - E13 - - 129 PH14 I/O FT -
TIM8_CH2N, UART4_RX,
CAN1_RX, FMC_D22,
EVENTOUT
-
- - - D13 130 - D13 - - 130 PH15 I/O FT -
TIM8_CH3N, FMC_D23,
EVENTOUT
-
Table 10. STM32F722xx and STM32F723xx pin and ball definition (continued)
Pin Number
Pin name
(function after
reset)
(1)
Pin type
I/O structure
Notes
Alternate functions
Additional
functions
STM32F722xx STM32F723xx
LQFP64
LQFP100
LQFP144
UFBGA176
LQFP176
WLCSP100
UFBGA176
UFBGA144
LQFP144
LQFP176
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