Datasheet
STM32F722xx STM32F723xx Pinouts and pin description
DocID028479 Rev 1 67/121
35 53 75 R14 94 - - - - - PB14 I/O FT -
TIM1_CH2N, TIM8_CH2N,
SPI2_MISO, USART3_RTS,
TIM12_CH1, SDMMC2_D0,
OTG_HS_DM, EVENTOUT
-
- - - - - J1 R14 L11 77 96 PB14 I/O FT - OTG_HS_DM -
36 54 76 R15 95 - - - - - PB15 I/O FT -
RTC_REFIN, TIM1_CH3N,
TIM8_CH3N,
SPI2_MOSI/I2S2_SD,
TIM12_CH2, SDMMC2_D1,
OTG_HS_DP, EVENTOUT
-
- - - - - H1 R15 L12 78 97 PB15 I/O FT - OTG_HS_DP -
- 55 77 P15 96 - P15 L9 79 98 PD8 I/O FT -
USART3_TX, FMC_D13,
EVENTOUT
-
- 56 78 P14 97 - P14 K9 80 99 PD9 I/O FT -
USART3_RX, FMC_D14,
EVENTOUT
-
- 57 79 N15 98 - N15 J9 81 100 PD10 I/O FT -
USART3_CK, FMC_D15,
EVENTOUT
-
Table 10. STM32F722xx and STM32F723xx pin and ball definition (continued)
Pin Number
Pin name
(function after
reset)
(1)
Pin type
I/O structure
Notes
Alternate functions
Additional
functions
STM32F722xx STM32F723xx
LQFP64
LQFP100
LQFP144
UFBGA176
LQFP176
WLCSP100
UFBGA176
UFBGA144
LQFP144
LQFP176
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