Datasheet

STM32F722xx STM32F723xx Pinouts and pin description
DocID028479 Rev 1 65/121
28 46 69 R12 79 G3 R12 M9 69 79 PB10 I/O FT
(4)
TIM2_CH3, I2C2_SCL,
SPI2_SCK/I2S2_CK,
USART3_TX,
OTG_HS_ULPI_D3, EVENTOUT
-
29 47 70 R13 80 H3 R13 M10 70 80 PB11 I/O FT
(4)
TIM2_CH4, I2C2_SDA,
USART3_RX,
OTG_HS_ULPI_D4, EVENTOUT
-
30 48 71 M10 81 J3 M10 H7 71 81 VCAP_1 S - - - - 31 49 - - - K3 - - - - VSS S - - - - 32 50 72 N10 82 K2 N10 G7 72 82 VDD S - - - -
- - - M11 83 - M11 - - 83 PH6 I/O FT -
I2C2_SMBA, SPI5_SCK,
TIM12_CH1, FMC_SDNE1,
EVENTOUT
-
- - - N12 84 - N12 - - 84 PH7 I/O FT -
I2C3_SCL, SPI5_MISO,
FMC_SDCKE1, EVENTOUT
-
- - - M12 85 - M12 - - 85 PH8 I/O FT -
I2C3_SDA, FMC_D16,
EVENTOUT
-
- - - M13 86 - M13 - - 86 PH9 I/O FT -
I2C3_SMBA, TIM12_CH2,
FMC_D17, EVENTOUT
-
Table 10. STM32F722xx and STM32F723xx pin and ball definition (continued)
Pin Number
Pin name
(function after
reset)
(1)
Pin type
I/O structure
Notes
Alternate functions
Additional
functions
STM32F722xx STM32F723xx
LQFP64
LQFP100
LQFP144
UFBGA176
LQFP176
WLCSP100
UFBGA176
UFBGA144
LQFP144
LQFP176
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