Datasheet

Functional overview STM32F722xx STM32F723xx
28/121 DocID028479 Rev 1
Figure 11. Regulator OFF
The following conditions must be respected:
• V
DD
should always be higher than V
CAP_1
and V
CAP_2
to avoid current injection
between power domains.
• If the time for V
CAP_1
and V
CAP_2
to reach V
12
minimum value is faster than the time for
V
DD
to reach 1.7 V, then PA0 should be kept low to cover both conditions: until V
CAP_1
and V
CAP_2
reach V
12
minimum value and until V
DD
reaches 1.7 V (see Figure 12).
• Otherwise, if the time for V
CAP_1
and V
CAP_2
to reach V
12
minimum value is slower
than the time for V
DD
to reach 1.7 V, then PA0 could be asserted low externally (see
Figure 13).
• If V
CAP_1
and V
CAP_2
go below V
12
minimum value and V
DD
is higher than 1.7 V, then a
reset must be asserted on PA0 pin.
Note: The minimum value of V
12
depends on the maximum frequency targeted in the application.
Note: On the LQFP64 pin package, the V
CAP_2
is not available.
DL9
%<3$66B5(*
9
&$3B
9
&$3B
3$
9
9
''
1567
9
''
$SSOLFDWLRQUHVHW
VLJQDORSWLRQDO
([WHUQDO9
&$3B
SRZHU
VXSSO\VXSHUYLVRU
([WUHVHWFRQWUROOHUDFWLYH
ZKHQ9
&$3B
0LQ9


9
Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.