Datasheet
DocID027107 Rev 6 201/202
STM32F446xC/E Revision history
201
03-Nov-2015 5
Updated:
– Introduction;
– Table 2: STM32F446xC/E features and peripheral counts
– Table 43: Main PLL characteristics
– Title of Table 45: PLLISAI characteristics
– Table 109: LQPF100, 14 x 14 mm 100-pin low-profile quad flat
package mechanical data
– Table 118: Ordering information scheme
– Figure 10: STM32F446xC/xE LQFP64 pinout
– Figure 11: STM32F446xC/xE LQFP100 pinout
Added:
– Figure 77: UFBGA144 - 144-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine
pitch ball grid array package recommended footprint
– Figure 111: UFBGA144 - 144-pin, 7 x 7 mm, 0.50 mm pitch, ultra fine
pitch ball grid array package mechanical data
02-Sep-2016 6
Updated:
– Section 7: Package information;
– Table 30: Typical current consumption in Run mode, code with data
processing running from Flash memory or RAM, regulator ON (ART
accelerator enabled except prefetch), VDD=1.7 V
– Table 74: ADC characteristics
– Table 85: DAC characteristics
Added:
– Note 3 in Figure 33: Recommended NRST pin protection
– Note 4 in Table 41: HSI oscillator characteristics
Table 119. Document revision history (continued)
Date Revision Changes
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