Datasheet

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Functional overview STM32F446xC/E

20/202 DocID027107 Rev 6

The DMA can be used with the main peripherals:

• SPI and I

• I

• USART

• General-purpose, basic and advanced-control timers TIMx

• DAC

• SDIO

• Camera interface (DCMI)

• ADC

• SAI1/SAI2

• SPDIF Receiver (SPDIFRx)

• QuadSPI

3.9 Flexible memory controller (FMC)

All devices embed an FMC. It has seven Chip Select outputs supporting the following

modes: SDRAM/LPSDR SDRAM, SRAM, PSRAM, NOR Flash and NAND Flash. With the

possibility to remap FMC bank 1 (NOR/PSRAM 1 and 2) and FMC SDRAM bank 1/2 in the

Cortex-M4 code area.

Functionality overview:

• 8-,16-bit data bus width

• Read FIFO for SDRAM controller

• Write FIFO

• Maximum FMC_CLK/FMC_SDCLK frequency for synchronous accesses is 90 MHz.

LCD parallel interface

The FMC can be configured to interface seamlessly with most graphic LCD controllers. It

supports the Intel 8080 and Motorola 6800 modes, and is flexible enough to adapt to

specific LCD interfaces. This LCD parallel interface capability makes it easy to build cost-

effective graphic applications using LCD modules with embedded controllers or high

performance solutions using external controllers with dedicated acceleration.

3.10 Quad SPI memory interface (QUADSPI)

All devices embed a Quad SPI memory interface, which is a specialized communication

interface targeting Single, Dual or Quad SPI flash memories. It can work in direct mode

through registers, external flash status register polling mode and memory mapped mode.

Up to 256 Mbytes external flash are memory mapped, supporting 8, 16 and 32-bit access.

Code execution is supported. The opcode and the frame format are fully programmable.

Communication can be either in Single Data Rate or Dual Data Rate.

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