Datasheet

Electrical characteristics STM32F446xC/E
154/202 DocID027107 Rev 6
Table 86. Asynchronous non-multiplexed SRAM/PSRAM/NOR -
read timings
(1)(2)
1. C
L
= 30 pF.
2. Guaranteed based on test during characterization.
Symbol Parameter Min Max Unit
t
w(NE)
FMC_NE low time 2T
HCLK
– 2 2 T
HCLK
+ 0.5
ns
t
v(NOE_NE)
FMC_NEx low to FMC_NOE low 0 1
t
w(NOE)
FMC_NOE low time 2T
HCLK
- 1 2T
HCLK
+ 0.5
t
h(NE_NOE)
FMC_NOE high to FMC_NE high hold time 0 -
t
v(A_NE)
FMC_NEx low to FMC_A valid - 0.5
t
h(A_NOE)
Address hold time after FMC_NOE high 0 -
t
v(BL_NE)
FMC_NEx low to FMC_BL valid - 2
t
h(BL_NOE)
FMC_BL hold time after FMC_NOE high 0 -
t
su(Data_NE)
Data to FMC_NEx high setup time T
HCLK
- 2 -
t
su(Data_NOE)
Data to FMC_NOEx high setup time T
HCLK
- 2 -
t
h(Data_NOE)
Data hold time after FMC_NOE high 0 -
t
h(Data_NE)
Data hold time after FMC_NEx high 0 -
t
v(NADV_NE)
FMC_NEx low to FMC_NADV low - 0
t
w(NADV)
FMC_NADV low time - T
HCLK
+1
Table 87. Asynchronous non-multiplexed SRAM/PSRAM/NOR read -
NWAIT timings
(1)(2)
1. C
L
= 30 pF.
2. Guaranteed based on test during characterization.
Symbol Parameter Min Max Unit
t
w(NE)
FMC_NE low time 7T
HCLK
+ 1 7T
HCLK
ns
t
w(NOE)
FMC_NWE low time 5T
HCLK
– 1 5T
HCLK
+ 1
t
w(NWAIT)
FMC_NWAIT low time T
HCLK
– 0.5 -
t
su(NWAIT_NE)
FMC_NWAIT valid before FMC_NEx high 5T
HCLK
+ 1.5 -
t
h(NE_NWAIT)
FMC_NEx hold time after FMC_NWAIT
invalid
4T
HCLK
+ 1 -
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