Datasheet

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STM32F446xC/E Electrical characteristics
175
USB high speed (HS) characteristics
Unless otherwise specified, the parameters given in Table 73 for ULPI are derived from
tests performed under the ambient temperature, f
HCLK
frequency summarized in Table 72
and V
DD
supply voltage conditions summarized in Table 71, with the following configuration:
• Output speed is set to OSPEEDRy[1:0] = 10, unless otherwise specified
• Capacitive load C = 30 pF, unless otherwise specified
• Measurement points are done at CMOS levels: 0.5V
DD
.
Refer to Section 6.3.17: I/O port characteristics for more details on the input/output
characteristics.
Table 70. USB OTG full speed electrical characteristics
(1)
1. Guaranteed by design.
Driver characteristics
Symbol Parameter Conditions Min Max Unit
t
r
Rise time
(2)
2.
Measured from 10% to 90% of the data signal. For more detailed informations, please refer to USB
Specification - Chapter 7 (version 2.0).
C
L
= 50 pF 420ns
t
f
Fall time
(2)
C
L
= 50 pF 4 20 ns
t
rfm
Rise/ fall time matching t
r
/t
f
90 110 %
V
CRS
Output signal crossover voltage - 1.3 2.0 V
Z
DRV
Output driver impedance
(3)
3. No external termination series resistors are required on DP (D+) and DM (D-) pins since the matching
impedance is included in the embedded driver.
Driving high or
low
28 44 Ω
Table 71. USB HS DC electrical characteristics
Symbol Parameter Min.
(1)
1. All the voltages are measured from the local ground potential.
Max.
(1)
Unit
Input level V
DD
USB OTG HS operating voltage 1.7 3.6 V
Table 72. USB HS clock timing parameters
(1)
Symbol Parameter Min Typ Max Unit
-
f
HCLK
value to guarantee proper operation of
USB HS interface
30 - - MHz
F
START_8BIT
Frequency (first transition) 8-bit ±10% 54 60 66 MHz
F
STEADY
Frequency (steady state) ±500 ppm 59.97 60 60.03 MHz
D
START_8BIT
Duty cycle (first transition) 8-bit ±10% 40 50 60 %
D
STEADY
Duty cycle (steady state) ±500 ppm 49.975 50 50.025 %
t
STEADY
Time to reach the steady state frequency and
duty cycle after the first transition
--1.4ms
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