Datasheet

DocID024030 Rev 10 167/239
STM32F427xx STM32F429xx Electrical characteristics
198
I
DDA
(4)
DAC DC VDDA
current consumption in
quiescent mode
(3)
- - 280 380 µA
With no load, middle code
(0x800) on the inputs
- - 475 625 µA
With no load, worst code
(0xF1C) at V
REF+
= 3.6 V in
terms of DC consumption on
the inputs
DNL
(4)
Differential non
linearity Difference
between two
consecutive code-
1LSB)
- - - ±0.5 LSB
Given for the DAC in 10-bit
configuration.
---±2 LSB
Given for the DAC in 12-bit
configuration.
INL
(4)
Integral non linearity
(difference between
measured value at
Code i and the value
at Code i on a line
drawn between Code
0 and last Code 1023)
---±1LSB
Given for the DAC in 10-bit
configuration.
---±4LSB
Given for the DAC in 12-bit
configuration.
Offset
(4)
Offset error
(difference between
measured value at
Code (0x800) and the
ideal value = V
REF+
/2)
---±10mV
Given for the DAC in 12-bit
configuration
---±3LSB
Given for the DAC in 10-bit at
V
REF+
= 3.6 V
---±12LSB
Given for the DAC in 12-bit at
V
REF+
= 3.6 V
Gain
error
(4)
Gain error - - - ±0.5 %
Given for the DAC in 12-bit
configuration
t
SETTLIN
G
(4)
Settling time (full
scale: for a 10-bit input
code transition
between the lowest
and the highest input
codes when
DAC_OUT reaches
final value ±4LSB
--36µs
C
LOAD
≤ 50 pF,
R
LOAD
≥ 5 kΩ
THD
(4)
Total Harmonic
Distortion
Buffer ON
----dB
C
LOAD
≤ 50 pF,
R
LOAD
≥ 5 kΩ
Update
rate
(2)
Max frequency for a
correct DAC_OUT
change when small
variation in the input
code (from code i to
i+1LSB)
---1
MS/
s
C
LOAD
≤ 50 pF,
R
LOAD
≥ 5 kΩ
Table 85. DAC characteristics (continued)
Symbol Parameter Conditions Min Typ Max Unit Comments
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