Datasheet

DocID022063 Rev 8 61/206
STM32F415xx, STM32F417xx Pinouts and pin description
55 B6 89 133 A10 161
PB3
(JTDO/
TRACESWO)
I/O FT -
JTDO/ TRACESWO/
SPI3_SCK / I2S3_CK /
TIM2_CH2 / SPI1_SCK/
EVENTOUT
-
56 A6 90 134 A9 162
PB4
(NJTRST)
I/O FT -
NJTRST/ SPI3_MISO /
TIM3_CH1 / SPI1_MISO /
I2S3ext_SD/ EVENTOUT
-
57 D7 91 135 A6 163 PB5 I/O FT -
I2C1_SMBA/ CAN2_RX /
OTG_HS_ULPI_D7 /
ETH_PPS_OUT/TIM3_CH2
/ SPI1_MOSI/ SPI3_MOSI /
DCMI_D10 / I2S3_SD/
EVENTOUT
-
58 C7 92 136 B6 164 PB6 I/O FT -
I2C1_SCL/ TIM4_CH1 /
CAN2_TX /
DCMI_D5/USART1_TX/
EVENTOUT
-
59 B7 93 137 B5 165 PB7 I/O FT -
I2C1_SDA / FSMC_NL /
DCMI_VSYNC /
USART1_RX/ TIM4_CH2/
EVENTOUT
-
60 A7 94 138 D6 166 BOOT0 I B - - V
PP
61 D8 95 139 A5 167 PB8 I/O FT -
TIM4_CH3/SDIO_D4/
TIM10_CH1 / DCMI_D6 /
ETH_MII_TXD3 /
I2C1_SCL/ CAN1_RX/
EVENTOUT
-
62 C8 96 140 B4 168 PB9 I/O FT -
SPI2_NSS/ I2S2_WS /
TIM4_CH4/ TIM11_CH1/
SDIO_D5 / DCMI_D7 /
I2C1_SDA / CAN1_TX/
EVENTOUT
-
- - 97 141 A4 169 PE0 I/O FT -
TIM4_ETR / FSMC_NBL0 /
DCMI_D2/ EVENTOUT
-
- - 98 142 A3 170 PE1 I/O FT -
FSMC_NBL1 / DCMI_D3/
EVENTOUT
-
63 - 99 - D5 - V
SS
S- - - -
Table 7. STM32F41xxx pin and ball definitions (continued)
Pin number
Pin name
(function after
reset)
(1)
Pin type
I / O structure
Notes
Alternate functions
Additional
functions
LQFP64
WLCSP90
LQFP100 LQFP144
UFBGA176
LQFP176
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