Datasheet

Description STM32F415xx, STM32F417xx
24/206 DocID022063 Rev 8
The DMA can be used with the main peripherals:
SPI and I
2
S
I
2
C
USART
General-purpose, basic and advanced-control timers TIMx
DAC
SDIO
Cryptographic acceleration
Camera interface (DCMI)
ADC.
2.2.9 Flexible static memory controller (FSMC)
The FSMC is embedded in the STM32F415xx and STM32F417xx family. It has four Chip
Select outputs supporting the following modes: PCCard/Compact Flash, SRAM, PSRAM,
NOR Flash and NAND Flash.
Functionality overview:
Write FIFO
Maximum FSMC_CLK frequency for synchronous accesses is 60 MHz.
LCD parallel interface
The FSMC can be configured to interface seamlessly with most graphic LCD controllers. It
supports the Intel 8080 and Motorola 6800 modes, and is flexible enough to adapt to
specific LCD interfaces. This LCD parallel interface capability makes it easy to build cost-
effective graphic applications using LCD modules with embedded controllers or high
performance solutions using external controllers with dedicated acceleration.
2.2.10 Nested vectored interrupt controller (NVIC)
The STM32F415xx and STM32F417xx embed a nested vectored interrupt controller able to
manage 16 priority levels, and handle up to 82 maskable interrupt channels plus the 16
interrupt lines of the Cortex
®
-M4 with FPU core.
Closely coupled NVIC gives low-latency interrupt processing
Interrupt entry vector table address passed directly to the core
Allows early processing of interrupts
Processing of late arriving, higher-priority interrupts
Support tail chaining
Processor state automatically saved
Interrupt entry restored on interrupt exit with no instruction overhead
This hardware block provides flexible interrupt management features with minimum interrupt
latency.
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