Datasheet

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STM32F412xE/G Memory mapping
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Table 11. STM32F412xE/G register boundary addresses
Bus Boundary address Peripheral
0xE010 0000 - 0xFFFF FFFF Reserved
Cortex

-M4 0xE000 0000 - 0xE00F FFFF Cortex-M4 internal peripherals
AHB3
0xA000 2000 - 0xDFFF FFFF Reserved
0xA000 1000 - 0xA000 1FFF QuadSPI control register
0xA000 0000 - 0xA000 0FFF FSMC control register
0x9000 0000 - 0x9FFF FFFF QUADSPI
0x7000 0000 - 0x08FFF FFFF Reserved
0x6000 0000 - 0x6FFF FFFF FSMC
AHB2
0x5006 0C00 - 0x5FFF FFFF Reserved
0x5006 0800 0x5006 0BFF RNG
0x5004 000- 0x5006 07FF Reserved
0x5000 0000 - 0x5003 FFFF USB OTG FS
AHB1
0x4002 6800 - 0x4FFF FFFF Reserved
0x4002 6400 - 0x4002 67FF DMA2
0x4002 6000 - 0x4002 63FF DMA1
0x4002 5000 - 0x4002 4FFF Reserved
0x4002 3C00 - 0x4002 3FFF Flash interface register
0x4002 3800 - 0x4002 3BFF RCC
0x4002 3400 - 0x4002 37FF Reserved
0x4002 3000 - 0x4002 33FF CRC
0x4002 2000 - 0x4002 2FFF Reserved
0x4002 1C00 - 0x4002 1FFF GPIOH
0x4002 1800 - 0x4002 1BFF GPIOG
0x4002 1400 - 0x4002 17FF GPIOF
0x4002 1000 - 0x4002 13FF GPIOE
0x4002 0C00 - 0x4002 0FFF GPIOD
0x4002 0800 - 0x4002 0BFF GPIOC
0x4002 0400 - 0x4002 07FF GPIOB
0x4002 0000 - 0x4002 03FF GPIOA
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