Datasheet
Revision history STM32F405xx, STM32F407xx
200/202 DocID022152 Rev 8
06-Mar-2015 5
Replace Cortex-M4F by Cortex-M4 with FPU throughout the
document.
Updated Section : Regulator OFF and Table 3: Regulator ON/OFF and
internal reset ON/OFF availability for LQFP176.
Updated Figure 15: STM32F40xxx LQFP176 pinout and Table 7:
STM32F40xxx pin and ball definitions.
Updated Figure 6: Multi-AHB matrix.
Added note 1 below Figure 12: STM32F40xxx LQFP64 pinout,
Figure 13: STM32F40xxx LQFP100 pinout, Figure 14: STM32F40xxx
LQFP144 pinout and Figure 15: STM32F40xxx LQFP176 pinout.
Updated I
VDD
and I
VSS
in Table 12: Current characteristics.
Updated PLS[2:0]=101 (falling edge) configuration in Table 19:
Embedded reset and power control block characteristics.
Added Section : Additional current consumption. Updated Section :
On-chip peripheral current consumption.
Updated Table 29: Low-power mode wakeup timings.
Updated Table 32: HSE 4-26 MHz oscillator characteristics and
Table 33: LSE oscillator characteristics (fLSE = 32.768 kHz).
Changed condition related to V
ESD(CDM)
in Table 45: ESD absolute
maximum ratings.
Updated Table 47: I/O current injection susceptibility, Table 48: I/O
static characteristics, Table 49: Output voltage characteristics
conditions, Table 50: I/O AC characteristics and Figure 37: I/O AC
characteristics definition.
Updated Section : I2C interface characteristics.
Remove note 3 in Table 69: Temperature sensor characteristics.
Updated Figure 72: DCMI timing diagram.
Modified Figure 75: WLCSP90 - 4.223 x 3.969 mm, 0.400 mm pitch
wafer level chip scale package outline and Table 90: WLCSP90 - 4.223
x 3.969 mm, 0.400 mm pitch wafer level chip scale package
mechanical data. Added Figure 76: WLCSP90 - 4.223 x 3.969 mm,
0.400 mm pitch wafer level chip scale recommended footprint and
Table 91: WLCSP90 recommended PCB design rules. /
Modified Figure 78: LQFP64 – 64-pin, 10 x 10 mm low-profile quad flat
package outline and Table 92: LQFP64 – 64-pin 10 x 10 mm low-profile
quad flat package mechanical data.
Updated Figure 87: UFBGA176+25 ball, 10 x 10 mm, 0.65 mm pitch,
ultra fine pitch ball grid array package outline and Table 95:
UFBGA176+25 ball, 10 × 10 × 0.65 mm pitch, ultra thin fine pitch ball
grid array mechanical data. Added Figure 88: UFBGA176+25 - 201-
ball, 10 x 10 mm, 0.65 mm pitch, ultra fine pitch ball grid array
recommended footprint and Table 96: UFBGA176+2 recommended
PCB design rules (0.65 mm pitch BGA).
Updated Figure 90: LQFP176 - 176-pin, 24 x 24 mm low profile quad
flat package outline.
Added Section : Device marking for WLCSP90, Section : Device
marking for LQFP64, Section : Device marking for LFP100, Section :
Device marking for LQPF144, Section : Device marking for
UFBGA176+25 and Section : Device marking for LQFP176.
Table 100. Document revision history (continued)
Date Revision Changes
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