Datasheet

Electrical characteristics STM32F405xx, STM32F407xx
92/167 Doc ID 022152 Rev 2
5.3.11 PLL spread spectrum clock generation (SSCG) characteristics
The spread spectrum clock generation (SSCG) feature allows to reduce electromagnetic
interferences (see Table 40: EMI characteristics). It is available only on the main PLL.
Equation 1
The frequency modulation period (MODEPER) is given by the equation below:
f
PLL_IN
and f
Mod
must be expressed in Hz.
As an example:
If f
PLL_IN
= 1 MHz, and f
MOD
= 1 kHz, the modulation depth (MODEPER) is given by
equation 1:
Equation 2
Equation 2 allows to calculate the increment step (INCSTEP):
f
VCO_OUT
must be expressed in MHz.
With a modulation depth (md) = ±2 % (4 % peak to peak), and f
VCO_OUT
= 240 (in MHz):
An amplitude quantization error may be generated because the linear modulation profile is
obtained by taking the quantized values (rounded to the nearest integer) of MODPER and
INCSTEP. As a result, the achieved modulation depth is quantized. The percentage
quantized modulation depth is given by the following formula:
As a result:
The error in modulation depth is consequently: 2.0 - 1.99954 = 0.00046%.
Table 34. SSCG parameters constraint
Symbol Parameter Min Typ Max
(1)
Unit
f
Mod
Modulation frequency - - 10 KHz
md Peak modulation depth 0.25 - 2 %
MODEPER * INCSTEP - - 2
15
−1-
1. Guaranteed by design, not tested in production.
MODEPER round f
PLL_IN
4f
Mod
×()⁄[]=
MODEPER round 10
6
410
3
×()⁄[]25==
INCSTEP round 2
15
1–()md f
VCO_OUT
××()100 5× MODEPER×()⁄[]=
INCSTEP round 2
15
1–()2 240××()100 5× 25×()⁄[]1258md(quantitazed)%==
md
quantized
% MODEPER INCSTEP× 100× 5×()2
15
1–()f
VCO_OUT
×()⁄=
md
quantized
% 25 1258× 100× 5×()2
15
1–()240×()⁄ 1.99954%(peak)==