Datasheet

Electrical characteristics STM32F405xx, STM32F407xx
68/167 Doc ID 022152 Rev 2
5.3.2 VCAP1/VCAP2 external capacitor
Stabilization for the main regulator is achieved by connecting an external capacitor C
EXT
to
the VCAP1/VCAP2 pins. C
EXT
is specified in Ta b l e 1 3 .
Figure 20. External capacitor C
EXT
1. Legend: ESR is the equivalent series resistance.
5.3.3 Operating conditions at power-up / power-down (regulator ON)
Subject to general operating conditions for T
A
.
Table 14. Operating conditions at power-up / power-down (regulator ON)
5.3.4 Operating conditions at power-up / power-down (regulator OFF)
Subject to general operating conditions for T
A
.
Table 13. VCAP1/VCAP2 operating conditions
Symbol Parameter Conditions
CEXT Capacitance of external capacitor 2.2 µF
ESR ESR of external capacitor < 2 Ω
MS19044V1
ESR
R
Leak
C
Symbol Parameter Min Max Unit
t
VDD
V
DD
rise time rate 20
∞
µs/V
V
DD
fall time rate 20
∞
Table 15. Operating conditions at power-up / power-down (regulator OFF)
(1)
1. To reset the internal logic at power-down, a reset must be applied on pin PA0 when V
DD
reach below
1.08 V.
Symbol Parameter Conditions Min Max Unit
t
VDD
V
DD
rise time rate Power-up 20
∞
µs/V
V
DD
fall time rate Power-down 20
∞
t
VCAP
V
CAP_1
and V
CAP_2
rise time
rate
Power-up 20
∞
V
CAP_1
and V
CAP_2
fall time
rate
Power-down 20
∞