Datasheet

Pinouts and pin description STM32F405xx, STM32F407xx
54/167 Doc ID 022152 Rev 2
59 93 137 B5 165 PB7 I/O FT
I2C1_SDA / FSMC_NL /
DCMI_VSYNC /
USART1_RX/ TIM4_CH2/
EVENTOUT
60 94 138 D6 166 BOOT0 I B V
PP
61 95 139 A5 167 PB8 I/O FT
TIM4_CH3/SDIO_D4/
TIM10_CH1 / DCMI_D6 /
ETH_MII_TXD3 /
I2C1_SCL/ CAN1_RX/
EVENTOUT
62 96 140 B4 168 PB9 I/O FT
SPI2_NSS/ I2S2_WS /
TIM4_CH4/ TIM11_CH1/
SDIO_D5 / DCMI_D7 /
I2C1_SDA / CAN1_TX/
EVENTOUT
- 97 141 A4 169 PE0 I/O FT
TIM4_ETR / FSMC_NBL0 /
DCMI_D2/ EVENTOUT
- 98 142 A3 170 PE1 I/O FT
FSMC_NBL1 / DCMI_D3/
EVENTOUT
63 99 - D5 - V
SS
S
- - 143C6171 PDR_ON I FT
64
10
0
144C5172 V
DD
S
- - - D4 173 PI4 I/O FT
TIM8_BKIN / DCMI_D5/
EVENTOUT
- - - C4 174 PI5 I/O FT
TIM8_CH1 /
DCMI_VSYNC/
EVENTOUT
- - - C3 175 PI6 I/O FT
TIM8_CH2 / DCMI_D6/
EVENTOUT
- - - C2 176 PI7 I/O FT
TIM8_CH3 / DCMI_D7/
EVENTOUT
1. Function availability depends on the chosen device.
2. PC13, PC14, PC15 and PI8 are supplied through the power switch. Since the switch only sinks a limited amount of current
(3 mA), the use of GPIOs PC13 to PC15 and PI8 in output mode is limited:
- The speed should not exceed 2 MHz with a maximum load of 30 pF.
- These I/Os must not be used as a current source (e.g. to drive an LED).
3. Main function after the first backup domain power-up. Later on, it depends on the contents of the RTC registers even after
reset (because these registers are not reset by the main reset). For details on how to manage these I/Os, refer to the RTC
register description sections in the STM32F4xx reference manual, available from the STMicroelectronics website:
www.st.com.
4. FT = 5 V tolerant except when in analog mode or oscillator mode (for PC14, PC15, PH0 and PH1).
Table 6. STM32F40x pin and ball definitions (continued)
Pin number
Pin name
(function after
reset)
(1)
Pin type
I / O structure
Notes
Alternate functions Additional functions
LQFP64
LQFP100 LQFP144
UFBGA176
LQFP176