Datasheet

STM32F405xx, STM32F407xx Pinouts and pin description
Doc ID 022152 Rev 2 47/167
23 32 43 R3 53 PA7 I/O FT
(4)
SPI1_MOSI/ TIM8_CH1N /
TIM14_CH1/TIM3_CH2/
ETH_MII_RX_DV /
TIM1_CH1N /
RMII_CRS_DV/
EVENTOUT
ADC12_IN7
24 33 44 N5 54 PC4 I/O FT
(4)
ETH_RMII_RX_D0 /
ETH_MII_RX_D0/
EVENTOUT
ADC12_IN14
25 34 45 P5 55 PC5 I/O FT
(4)
ETH_RMII_RX_D1 /
ETH_MII_RX_D1/
EVENTOUT
ADC12_IN15
26 35 46 R5 56 PB0 I/O FT
(4)
TIM3_CH3 / TIM8_CH2N/
OTG_HS_ULPI_D1/
ETH_MII_RXD2 /
TIM1_CH2N/ EVENTOUT
ADC12_IN8
27 36 47 R4 57 PB1 I/O FT
(4)
TIM3_CH4 / TIM8_CH3N/
OTG_HS_ULPI_D2/
ETH_MII_RXD3 /
OTG_HS_INTN /
TIM1_CH3N/ EVENTOUT
ADC12_IN9
28 37 48 M6 58
PB2-BOOT1
(PB2)
I/O FT EVENTOUT
- - 49 R6 59 PF11 I/O FT DCMI_12/ EVENTOUT
- - 50 P6 60 PF12 I/O FT FSMC_A6/ EVENTOUT
--51M861 V
SS
S
--52N862 V
DD
S
- - 53 N6 63 PF13 I/O FT FSMC_A7/ EVENTOUT
- - 54 R7 64 PF14 I/O FT FSMC_A8/ EVENTOUT
- - 55 P7 65 PF15 I/O FT FSMC_A9/ EVENTOUT
- - 56 N7 66 PG0 I/O FT FSMC_A10/ EVENTOUT
- - 57 M7 67 PG1 I/O FT FSMC_A11/ EVENTOUT
- 38 58 R8 68 PE7 I/O FT
FSMC_D4/TIM1_ETR/
EVENTOUT
- 39 59 P8 69 PE8 I/O FT
FSMC_D5/ TIM1_CH1N/
EVENTOUT
- 40 60 P9 70 PE9 I/O FT
FSMC_D6/TIM1_CH1/
EVENTOUT
--61M971 V
SS
S
Table 6. STM32F40x pin and ball definitions (continued)
Pin number
Pin name
(function after
reset)
(1)
Pin type
I / O structure
Notes
Alternate functions Additional functions
LQFP64
LQFP100 LQFP144
UFBGA176
LQFP176