Datasheet

Pinouts and pin description STM32F405xx, STM32F407xx
46/167 Doc ID 022152 Rev 2
14 23 34 N3 40
PA 0-WKUP
(PA0)
I/O FT
(5)
USART2_CTS/ UART4_TX/
ETH_MII_CRS /
TIM2_CH1_ETR/
TIM5_CH1 / TIM8_ETR/
EVENTOUT
ADC123_IN0/WKUP
(4)
15 24 35 N2 41 PA1 I/O FT
(4)
USART2_RTS /
UART4_RX/
ETH_RMII_REF_CLK /
ETH_MII_RX_CLK /
TIM5_CH2 / TIMM2_CH2/
EVENTOUT
ADC123_IN1
16 25 36 P2 42 PA2 I/O FT
(4)
USART2_TX/TIM5_CH3 /
TIM9_CH1 / TIM2_CH3 /
ETH_MDIO/ EVENTOUT
ADC123_IN2
- - - F4 43 PH2 I/O FT ETH_MII_CRS/EVENTOUT
- - - G4 44 PH3 I/O FT ETH_MII_COL/EVENTOUT
-- -H445 PH4 I/OFT
I2C2_SCL /
OTG_HS_ULPI_NXT/
EVENTOUT
- - - J4 46 PH5 I/O FT I2C2_SDA/ EVENTOUT
17 26 37 R2 47 PA3 I/O FT
(4)
USART2_RX/TIM5_CH4 /
TIM9_CH2 / TIM2_CH4 /
OTG_HS_ULPI_D0 /
ETH_MII_COL/
EVENTOUT
ADC123_IN3
18 27 38 - 48 V
SS
S
L4 - BYPASS_REG I FT
19 28 39 K4 49 V
DD
S
20 29 40 N4 50 PA4 I/O TTa
(4)
SPI1_NSS / SPI3_NSS /
USART2_CK /
DCMI_HSYNC /
OTG_HS_SOF/ I2S3_WS/
EVENTOUT
ADC12_IN4 /DAC1_OUT
21 30 41 P4 51 PA5 I/O TTa
(4)
SPI1_SCK/
OTG_HS_ULPI_CK /
TIM2_CH1_ETR/
TIM8_CHIN/ EVENTOUT
ADC12_IN5/DAC2_OUT
22 31 42 P3 52 PA6 I/O FT
(4)
SPI1_MISO /
TIM8_BKIN/TIM13_CH1 /
DCMI_PIXCLK / TIM3_CH1
/ TIM1_BKIN/ EVENTOUT
ADC12_IN6
Table 6. STM32F40x pin and ball definitions (continued)
Pin number
Pin name
(function after
reset)
(1)
Pin type
I / O structure
Notes
Alternate functions Additional functions
LQFP64
LQFP100 LQFP144
UFBGA176
LQFP176