Datasheet

Description STM32F405xx, STM32F407xx
26/167 Doc ID 022152 Rev 2
Figure 8. Startup in regulator OFF: slow V
DD
slope
- power-down reset risen after V
CAP_1
/V
CAP_2
stabilization
1. This figure is valid both whatever the internal reset mode (on or off).
Figure 9. Startup in regulator OFF mode: fast V
DD
slope
- power-down reset risen before V
CAP_1
/V
CAP_2
stabilization
1. This figure is valid both whatever the internal reset mode (on or off).
2.2.17 Real-time clock (RTC), backup SRAM and backup registers
The backup domain of the STM32F405xx and STM32F407xx includes:
● The real-time clock (RTC)
● 4 Kbytes of backup SRAM
● 20 backup registers
The real-time clock (RTC) is an independent BCD timer/counter. Dedicated registers contain
the second, minute, hour (in 12/24 hour), week day, date, month, year, in BCD (binary-coded
decimal) format. Correction for 28, 29 (leap year), 30, and 31 day of the month are
performed automatically. The RTC provides a programmable alarm and programmable
periodic interrupts with wakeup from Stop and Standby modes. The sub-seconds value is
also available in binary format.
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