Datasheet

STM32F405xx, STM32F407xx Description
Doc ID 022152 Rev 2 23/167
2.2.15 Power supply supervisor
The power supply supervisor is enabled by holding PDR_ON high.
The device has an integrated power-on reset (POR) / power-down reset (PDR) circuitry
coupled with a Brownout reset (BOR) circuitry. At power-on, BOR is always active, and
ensures proper operation starting from 1.8 V. After the 1.8 V BOR threshold level is reached,
the option byte loading process starts, either to confirm or modify default thresholds, or to
disable BOR permanently. Three BOR thresholds are available through option bytes.
The device remains in reset mode when V
DD
is below a specified threshold, V
POR/PDR
or
V
BOR
, without the need for an external reset circuit.
The device also features an embedded programmable voltage detector (PVD) that monitors
the V
DD
/V
DDA
power supply and compares it to the V
PVD
threshold. An interrupt can be
generated when V
DD
/V
DDA
drops below the V
PVD
threshold and/or when V
DD
/V
DDA
is higher
than the V
PVD
threshold. The interrupt service routine can then generate a warning
message and/or put the MCU into a safe state. The PVD is enabled by software.
All packages, except for the LQFP64 and LQFP100, have an internal reset controlled
through the PDR_ON signal.
2.2.16 Voltage regulator
The regulator has eight operating modes:
Regulator ON/internal reset ON
Main regulator mode (MR)
Low power regulator (LPR)
Power-down
Regulator ON/internal reset OFF
Main regulator mode (MR)
Low power regulator (LPR)
Power-down
Regulator OFF/internal reset ON
Regulator OFF/internal reset OFF
Regulator ON
Regulator ON/internal reset ON
The regulator ON/internal reset ON mode is always enabled on LQFP64 and LQFP100
package.
On LQFP144 package, this mode is activated by setting PDR_ON to V
DD
.
On UFBGA176 package, the internal regulator must be activated by connecting
BYPASS_REG to V
SS,
and PDR_ON to V
DD
.
On LQFP176 packages, the internal reset must be activated by connecting PDR_ON to
V
DD
.