Datasheet

Revision history STM32F405xx, STM32F407xx
166/167 Doc ID 022152 Rev 2
24-Jan-2012
2
(continued)
Updated Table 57: USB FS clock timing parameters and Table 59: USB
HS clock timing parameters
Updated Table 65: ADC characteristics.
Updated Table 66: ADC accuracy at f
ADC
= 30 MHz.
Updated Note 1 in Table 70: DAC characteristics.
Section 5.3.25: FSMC characteristics: updated Ta ble 71 toTabl e 8 2,
changed C
L
value to 30 pF, and modified FSMC configuration for
asynchronous timings and waveforms. Updated Figure 57:
Synchronous multiplexed PSRAM write timings.
Updated Table 91: Package thermal characteristics.
Appendix A.3: USB OTG full speed (FS) interface solutions: modified
Figure 82: USB controller configured as peripheral-only and used in
Full speed mode added Note 2, updated Figure 83: USB controller
configured as host-only and used in full speed mode and added
Note 2, changed Figure 84: USB controller configured in dual mode
and used in full speed mode and added Note 3.
Appendix A.4: USB OTG high speed (HS) interface solutions: removed
figures USB OTG HS device-only connection in FS mode and USB
OTG HS host-only connection in FS mode, and updated Figure 85:
USB controller configured as peripheral, host, or dual-mode and used
in high speed mode and added Note 2.
Added Appendix A.6: Ethernet interface solutions.
Table 94. Document revision history (continued)
Date Revision Changes