Datasheet

Electrical characteristics STM32F405xx, STM32F407xx
134/167 Doc ID 022152 Rev 2
Figure 58. Synchronous non-multiplexed NOR/PSRAM read timings
Table 77. Synchronous non-multiplexed NOR/PSRAM read timings
(1)(2)
1. C
L
= 30 pF.
2. Based on characterization, not tested in production.
Symbol Parameter Min Max Unit
t
w(CLK)
FSMC_CLK period 2T
HCLK
–0.5 - ns
t
d(CLKL-NExL)
FSMC_CLK low to FSMC_NEx low (x=0..2) - 0.5 ns
t
d(CLKL-NExH)
FSMC_CLK low to FSMC_NEx high (x= 0…2) 0 - ns
t
d(CLKL-NADVL)
FSMC_CLK low to FSMC_NADV low - 2 ns
t
d(CLKL-NADVH)
FSMC_CLK low to FSMC_NADV high 3 - ns
t
d(CLKL-AV)
FSMC_CLK low to FSMC_Ax valid (x=16…25) - 0 ns
t
d(CLKL-AIV)
FSMC_CLK low to FSMC_Ax invalid (x=16…25) 2 - ns
t
d(CLKL-NOEL)
FSMC_CLK low to FSMC_NOE low - 0.5 ns
t
d(CLKL-NOEH)
FSMC_CLK low to FSMC_NOE high 1.5 - ns
t
su(DV-CLKH)
FSMC_D[15:0] valid data before FSMC_CLK high 6 - ns
t
h(CLKH-DV)
FSMC_D[15:0] valid data after FSMC_CLK high 3 - ns
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