Datasheet

Electrical characteristics STM32F405xx, STM32F407xx
126/167 Doc ID 022152 Rev 2
Figure 51. 12-bit buffered /non-buffered DAC
1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly
without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the
DAC_CR register.
5.3.25 FSMC characteristics
Asynchronous waveforms and timings
Figure 52 through Figure 55 represent asynchronous waveforms and Ta bl e 7 1 through
Table 7 4 provide the corresponding timings. The results shown in these tables are obtained
with the following FSMC configuration:
● AddressSetupTime = 1
● AddressHoldTime = 0x1
● DataSetupTime = 0x1
● BusTurnAroundDuration = 0x0
In all timing tables, the
T
HCLK
is the HCLK clock period.
R
LOAD
C
LOAD
Buffered/Non-buffered DAC
DACx_OUT
Buffer(1)
12-bit
digital to
analog
converter
ai17157