Datasheet

Electrical characteristics STM32F405xx, STM32F407xx
118/167 Doc ID 022152 Rev 2
CAN (controller area network) interface
Refer to Section 5.3.16: I/O port characteristics for more details on the input/output alternate
function characteristics (CANTX and CANRX).
5.3.20 12-bit ADC characteristics
Unless otherwise specified, the parameters given in Ta bl e 6 5 are derived from tests
performed under the ambient temperature, f
PCLK2
frequency and V
DDA
supply voltage
conditions summarized in Ta bl e 1 1 .
Table 64. Dynamics characteristics: Ethernet MAC signals for MII
(1)
1. TBD stands for “to be defined”.
Symbol Rating Min Typ Max Unit
t
su(RXD)
Receive data setup time TBD TBD TBD ns
t
ih(RXD)
Receive data hold time TBD TBD TBD ns
t
su(DV)
Data valid setup time TBD TBD TBD ns
t
ih(DV)
Data valid hold time TBD TBD TBD ns
t
su(ER)
Error setup time TBD TBD TBD ns
t
ih(ER)
Error hold time TBD TBD TBD ns
t
d(TXEN)
Transmit enable valid delay time 13.4 15.5 17.7 ns
t
d(TXD)
Transmit data valid delay time 12.9 16.1 19.4 ns
Table 65. ADC characteristics
(1)
Symbol Parameter Conditions Min Typ Max Unit
V
DDA
Power supply 1.8
(2)
-3.6V
V
REF+
Positive reference voltage 1.8
(2)(3)(4)
-V
DDA
V
f
ADC
ADC clock frequency
V
DDA
= 1.8
(2)(4)
to 2.4 V 0.6 15 18 MHz
V
DDA
= 2.4 to 3.6 V
(4)
0.6 30 36 MHz
f
TRIG
(5)
External trigger frequency
f
ADC
= 30 MHz - - TBD kHz
--171/f
ADC
V
AIN
Conversion voltage range
(6)
0 (V
SSA
or V
REF-
tied to ground)
-V
REF+
V
R
AIN
(5)
External input impedance
See Equation 1 for
details
--50kΩ
R
ADC
(5)(7)
Sampling switch resistance - - 6 kΩ
C
ADC
(5)
Internal sample and hold
capacitor
-4-pF
t
lat
(5)
Injection trigger conversion
latency
f
ADC
= 30 MHz - - 0.100 µs
--3
(8)
1/f
ADC
t
latr
(5)
Regular trigger conversion
latency
f
ADC
= 30 MHz - - 0.067 µs
--2
(8)
1/f
ADC