Datasheet

Electrical characteristics STM32F401xB STM32F401xC
92/139 DS9716 Rev 11
In the user application, the number of I/O pins which can drive current must be limited to
respect the absolute maximum rating specified in Section 6.2. In particular:
• The sum of the currents sourced by all the I/Os on V
DD,
plus the maximum Run
consumption of the MCU sourced on V
DD,
cannot exceed the absolute maximum rating
ΣI
VDD
(see Table 12).
• The sum of the currents sunk by all the I/Os on V
SS
plus the maximum Run
consumption of the MCU sunk on V
SS
cannot exceed the absolute maximum rating
ΣI
VSS
(see Table 12).
Output voltage levels
Unless otherwise specified, the parameters given in Table 5 5 are derived from tests
performed under ambient temperature and V
DD
supply voltage conditions summarized in
Table 14 . All I/Os are CMOS and TTL compliant.
Input/output AC characteristics
The definition and values of input/output AC characteristics are given in Figure 31 and
Table 56 , respectively.
Unless otherwise specified, the parameters given in Table 5 6 are derived from tests
performed under the ambient temperature and V
DD
supply voltage conditions summarized
in Table 14.
Table 55. Output voltage characteristics
Symbol Parameter Conditions Min Max Unit
V
OL
(1)
1. The I
IO
current sunk by the device must always respect the absolute maximum rating specified in Table 12.
and the sum of I
IO
(I/O ports and control pins) must not exceed I
VSS
.
Output low level voltage for an I/O pin CMOS port
(2)
I
IO
= +8 mA
2.7 V
≤ V
DD
≤ 3.6 V
2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
-0.4
V
V
OH
(3)
3. The I
IO
current sourced by the device must always respect the absolute maximum rating specified in
Table 12 and the sum of I
IO
(I/O ports and control pins) must not exceed I
VDD
.
Output high level voltage for an I/O pin V
DD
–0.4 -
V
OL
(1)
Output low level voltage for an I/O pin TTL port
(2)
I
IO
=+8 mA
2.7 V
≤ V
DD
≤ 3.6 V
-0.4
V
V
OH
(3)
Output high level voltage for an I/O pin 2.4 -
V
OL
(1)
Output low level voltage for an I/O pin
I
IO
= +20 mA
2.7 V
≤ V
DD
≤ 3.6 V
-1.3
(4)
4. Guaranteed by characterization.
V
V
OH
(3)
Output high level voltage for an I/O pin V
DD
–1.3
(4)
-
V
OL
(1)
Output low level voltage for an I/O pin
I
IO
= +6 mA
1.8 V
≤ V
DD
≤ 3.6 V
-0.4
(4)
V
V
OH
(3)
Output high level voltage for an I/O pin V
DD
–0.4
(4)
-
V
OL
(1)
Output low level voltage for an I/O pin
I
IO
= +4 mA
1.7 V ≤ V
DD
≤ 3.6 V
-0.4
(5)
5. Guaranteed by design.
V
V
OH
(3)
Output high level voltage for an I/O pin V
DD
–0.4
(5)
-
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