Datasheet

DS9716 Rev 11 81/139
STM32F401xB STM32F401xC Electrical characteristics
113
Figure 27. ACC
LSI
versus temperature
6.3.10 PLL characteristics
The parameters given in Table 41 and Table 42 are derived from tests performed under
temperature and V
DD
supply voltage conditions summarized in Table 14.
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MAX
AVG
MIN
Table 41. Main PLL characteristics
Symbol Parameter Conditions Min Typ Max Unit
f
PLL_IN
PLL input clock
(1)
-0.95
(2)
12.10
MHz
f
PLL_OUT
PLL multiplier output clock - 24 - 84
f
PLL48_OUT
48 MHz PLL multiplier output clock - - 48 75
f
VCO_OUT
PLL VCO output - 192 - 432
t
LOCK
PLL lock time
VCO freq = 192 MHz 75 - 200
µs
VCO freq = 432 MHz 100 - 300
Jitter
(3)
Cycle-to-cycle jitter
System clock
84 MHz
RMS - 25 -
ps
peak to
peak
- ±150 -
Period Jitter
RMS - 15 -
peak to
peak
- ±200 -
I
DD(PLL)
(4)
PLL power consumption on V
DD
VCO freq = 192 MHz
VCO freq = 432 MHz
0.15
0.45
-
0.40
0.75
mA
I
DDA(PLL)
(4)
PLL power consumption on V
DDA
VCO freq = 192 MHz
VCO freq = 432 MHz
0.30
0.55
-
0.40
0.85
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