Datasheet

DS9716 Rev 11 61/139
STM32F401xB STM32F401xC Electrical characteristics
113
6.3.2 VCAP_1/VCAP_2 external capacitors
Stabilization for the main regulator is achieved by connecting 2 external capacitor C
EXT
to
the VCAP_1 and VCAP_2 pins. For packages supporting only 1 VCAP pin, the 2 CEXT
capacitors are replaced by a single capacitor.
C
EXT
is specified in Table 16.
Figure 20. External capacitor C
EXT
1. Legend: ESR is the equivalent series resistance.
6.3.3 Operating conditions at power-up / power-down (regulator ON)
Subject to general operating conditions for T
A
.
1. Applicable only when the code is executed from Flash memory. When the code is executed from RAM, no wait state is
required.
2. Thanks to the ART accelerator and the 128-bit Flash memory, the number of wait states given here does not impact the
execution speed from Flash memory since the ART accelerator allows to achieve a performance equivalent to 0 wait state
program execution.
3. Refer to Table 56: I/O AC characteristics for frequencies vs. external load.
4. V
DD
/V
DDA
minimum value of 1.7 V, with the use of an external power supply supervisor (refer to Section 3.14.2: Internal
reset OFF).
5. Prefetch is not available. Refer to AN3430 application note for details on how to adjust performance and power.
6. The voltage range for the USB full speed embedded PHY can drop down to 2.7 V. However the electrical characteristics of
D- and D+ pins will be degraded between 2.7 and 3 V.
Table 16. VCAP_1/VCAP_2 operating conditions
(1)
1. When bypassing the voltage regulator, the two 2.2 µF V
CAP
capacitors are not required and should be
replaced by two 100 nF decoupling capacitors.
Symbol Parameter Conditions
CEXT
Capacitance of external capacitor with available
VCAP_1 and VCAP_2 pins
2.2 µF
ESR
ESR of external capacitor with available VCAP_1 and
VCAP_2 pins
< 2 Ω
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(65
5
/HDN
&
Table 17. Operating conditions at power-up / power-down (regulator ON)
Symbol Parameter Min Max Unit
t
VDD
V
DD
rise time rate 20 ∞
µs/V
V
DD
fall time rate 20 ∞
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