Datasheet

DocID022691 Rev 7 25/137
STM32F373xx Functional overview
47
Reference clock detection: a more precise second source clock (50 or 60 Hz) can be
used to enhance the calendar precision.
The RTC clock sources can be:
A 32.768 kHz external crystal
A resonator or oscillator
The internal low-power RC oscillator (typical frequency of 40 kHz)
The high-speed external clock divided by 32
3.19 Inter-integrated circuit interface (I
2
C)
Two I
2
C bus interfaces can operate in multimaster and slave modes. They can support
standard (up to 100 kHz), fast (up to 400 kHz) and fast mode + (up to 1 MHz) modes with
20 mA output drive. They support 7-bit and 10-bit addressing modes, multiple 7-bit slave
addresses (2 addresses, 1 with configurable mask). They also include programmable
analog and digital noise filters.
In addition, they provide hardware support for SMBUS 2.0 and PMBUS 1.1: ARP capability,
Host notify protocol, hardware CRC (PEC) generation/verification, timeout verifications and
ALERT protocol management. They also have a clock domain independent from the CPU
clock, allowing the application to wake up the MCU from Stop mode on address match.
The I
2
C interfaces can be served by the DMA controller
Refer to Table 7 for the differences between I2C1 and I2C2.
Table 6. Comparison of I
2
C analog and digital filters
- Analog filter Digital filter
Pulse width of
suppressed spikes
50 ns
Programmable length from 1 to 15
I
2
C peripheral clocks
Benefits Available in Stop mode
1. Extra filtering capability vs.
standard requirements.
2. Stable length
Drawbacks
Variations depending on
temperature, voltage, process
Wakeup from Stop on address
match is not available when digital
filter is enabled
Table 7. STM32F373xx I
2
C implementation
I
2
C features
(1)
I2C1 I2C2
7-bit addressing mode X X
10-bit addressing mode X X
Standard mode (up to 100 kbit/s) X X
Fast mode (up to 400 kbit/s) X X
Fast Mode Plus with 20mA output drive I/Os (up to 1 Mbit/s) X X
Independent clock X X
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