Datasheet

Functional overview STM32F373xx
14/137 DocID022691 Rev 7
3.3 Embedded Flash memory
All STM32F373xx devices feature up to 256 Kbytes of embedded Flash memory available
for storing programs and data. The Flash memory access time is adjusted to the CPU clock
frequency (0 wait state from 0 to 24 MHz, 1 wait state from 24 to 48 MHz and 2 wait states
above).
3.4 Cyclic redundancy check (CRC) calculation unit
The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a
configurable generator polynomial value and size.
Among other applications, CRC-based techniques are used to verify data transmission or
storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of
verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of
the software during runtime, to be compared with a reference signature generated at
linktime and stored at a given memory location.
3.5 Embedded SRAM
All STM32F373xx devices feature up to 32 Kbytes of embedded SRAM with hardware parity
check. The memory can be accessed in read/write at CPU clock speed with 0 wait states.
3.6 Boot modes
At startup, Boot0 pin and Boot1 option bit are used to select one of three boot options:
• Boot from user Flash
• Boot from system memory
• Boot from embedded SRAM
The boot loader is located in system memory. It is used to reprogram the Flash memory by
using USART1 (PA9/PA10), USART2 (PD5/PD6) or USB (PA11/PA12) through DFU (device
firmware upgrade).
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