Datasheet

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STM32F334x4 STM32F334x6 STM32F334x8 Electrical characteristics
101
All I/Os are CMOS and TTL compliant (no software configuration required). Their
characteristics cover more than the strict CMOS-technology or TTL parameters. The
coverage of these requirements is shown in
Figure 19 and Figure 20 for standard I/Os.
Figure 19. TC and TTa I/O input characteristics - CMOS port
V
hys
Schmitt trigger
hysteresis
TT, TC and TTa I/O - 200
(1)
-
mVFT and FTf I/O - 100
(1)
-
BOOT0 - 300
(1)
-
I
lkg
Input leakage
current
(3)
TC, FT, TT, FTf and TTa
I/O in digital mode
V
SS
≤ V
IN
≤ V
DD
--±0.1
µA
TTa I/O in digital mode
V
DD
≤ V
IN
≤ V
DDA
--1
TTa I/O in analog mode
V
SS
≤ V
IN
≤ V
DDA
--±0.2
FT and FTf I/O
(4)
V
DD
≤ V
IN
≤ 5 V
--10
R
PU
Weak pull-up
equivalent resistor
(5)
V
IN
= V
SS
25 40 55 kΩ
R
PD
Weak pull-down
equivalent resistor
(5)
V
IN
= V
DD
25 40 55 kΩ
C
IO
I/O pin capacitance - - 5 - pF
1. Data based on design simulation.
2. Tested in production.
3. Leakage could be higher than the maximum value. If negative current is injected on adjacent pins. Refer to Table 49: I/O
current injection susceptibility.
4. To sustain a voltage higher than V
DD
+0.3 V, the internal pull-up/pull-down resistors must be disabled.
5. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This
PMOS/NMOS contribution to the series resistance is minimum (~10% order).
Table 50. I/O static characteristics (continued)
Symbol Parameter Conditions Min. Typ. Max. Unit
MS30255V2
V
DD
(V)
V
IHmin
2.0
V
ILmax
0.7
V
IL
/V
IH
(V)
1.3
2.0 3.6
V
ILmax
= 0.3V
DD
+0.07
0.6
2.7 3.0 3.3
CMOS standard requirements VILmax = 0.3V
DD
V
IHmin
= 0.445V
DD
+0.398
Area not determined
Tested in production
Tested in production
Based on design simulations
Based on design simulations
CMOS standard requirements V
IH
min = 0.7V
DD
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