Datasheet

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This is information on a product in full production.

October 2017 DocID025083 Rev 7 1/121

STM32F303x6/x8

Arm

Cortex

-M4 32b MCU+FPU, up to 64KB Flash, 16KB SRAM,

2 ADCs, 3 DACs, 3 comp., op-amp 2.0 - 3.6 V

Datasheet - production data

Features

• Core: Arm

Cortex

-M4 32-bit CPU with FPU

(72 MHz max), single-cycle multiplication, HW

division, 90 DMIPS (from CCM) and DSP

instruction

• Memories:

– Up to 64 Kbytes of Flash memory

– 12 Kbytes of SRAM with HW parity check

– Routine booster: 4 Kbytes of SRAM on

instruction and data bus with HW parity

check (CCM)

• CRC calculation unit

• Reset and supply management:

– Low-power modes: Sleep, Stop, Standby

–V

DD,

DDA

voltage range: 2.0 to 3.6 V

– Power-on/Power-down reset (POR/PDR)

– Programmable voltage detector (PVD)

–V

BAT

supply for RTC and backup registers

• Clock management:

– 4 to 32 MHz crystal oscillator

– 32 kHz oscillator for RTC with calibration

– Internal 8 MHz RC (up to 64 MHz with PLL

option)

– Internal 40 kHz oscillator

• Up to 51 fast I/O ports, all mappable on

external interrupt vectors, several 5 V-tolerant

• Interconnect Matrix

• 7-channel DMA controller

• Up to two ADC 0.20 µs (up to 21 channels) with

selectable resolution of 12/10/8/6 bits, 0 to

3.6 V conversion range, single-

ended/differential mode, separate analog

supply from 2.0 to 3.6 V

• Temperature sensor

• Up to three 12-bit DAC channels with analog

supply from 2.4 V to 3.6 V

• Three ultra-fast rail-to-rail analog comparators

with analog supply from 2 to 3.6 V

• One operational amplifiers that can be used in

PGA mode, all terminals accessible with

analog supply from 2.4 to 3.6 V

• Up to 18 capacitive sensing channels

supporting touchkeys, linear and rotary touch

sensors

• Up to 11 timers:

– One 32-bit timer and one 16-bit timer with

up to 4 IC/OC/PWM or pulse counter and

quadrature (incremental) encoder input

– One 16-bit 6-channel advanced-control

timer, with up to 6 PWM channels,

deadtime generation and emergency stop

– One 16-bit timer with 2 IC/OCs,

1 OCN/PWM, deadtime generation,

emergency stop

– Two 16-bit timers with IC/OC/OCN/PWM,

deadtime generation and emergency stop

– Two watchdog timers (independent,

window)

– SysTick timer: 24-bit downcounter

– Up to two 16-bit basic timers to drive DAC

• Calendar RTC with alarm, periodic wakeup

from Stop

• Communication interfaces:

– CAN interface (2.0 B Active) and one SPI

–One I

C with 20 mA current sink to support

Fast mode plus, SMBus/PMBus

LQFP32 (7 x 7 mm)

LQFP48 (7 x 7 mm)

LQFP64 (10 x 10 mm)

WLCSP49

(3.89 x 3.74 mm)

www.st.com

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Summary of content (121 pages)

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STM32F303x6/x8 Arm®Cortex®-M4 32b MCU+FPU, up to 64KB Flash, 16KB SRAM, 2 ADCs, 3 DACs, 3 comp., op-amp 2.0 - 3.6 V Datasheet - production data Features • Core: Arm® Cortex®-M4 32-bit CPU with FPU (72 MHz max), single-cycle multiplication, HW division, 90 DMIPS (from CCM) and DSP instruction LQFP32 (7 x 7 mm) LQFP48 (7 x 7 mm) LQFP64 (10 x 10 mm) • Memories: – Up to 64 Kbytes of Flash memory WLCSP49 (3.89 x 3.
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STM32F303x6/x8 – Up to 3 USARTs, one with ISO/IEC 7816 interface, LIN, IrDA, modem control • Debug mode: serial wire debug (SWD), JTAG • 96-bit unique ID • All packages ECOPACK®2 Table 1. Device summary Reference Part number STM32F303x6 STM32F303K6/C6/R6 STM32F303x8 STM32F303K8/C8/R8 2/121 Downloaded from Arrow.com.
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STM32F303x6/x8 Contents Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.1 Arm® Cortex®-M4 core with FPU with embedded Flash memory and SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Contents STM32F303x6/x8 3.14.1 Advanced timer (TIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.14.2 General-purpose timers (TIM2, TIM3, TIM15, TIM16 and TIM17) . . . . . 23 3.14.3 Basic timers (TIM6 and TIM7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.14.4 Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.14.5 Window watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM32F303x6/x8 7 Contents 6.3.5 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 6.3.6 Wakeup time from low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 6.3.7 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 6.3.8 Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 6.3.9 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . .
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List of tables STM32F303x6/x8 List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46.
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STM32F303x6/x8 Table 47. Table 48. Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. Table 74. Table 75. Table 76. Table 77. Table 78. Table 79. List of tables EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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List of figures STM32F303x6/x8 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43.
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STM32F303x6/x8 1 Introduction Introduction This datasheet provides the ordering information and the mechanical device characteristics of the STM32F303x6/8 microcontrollers. This document should be read in conjunction with the STM32F303xx, STM32F358xx and STM32F328xx advanced Arm®-based 32-bit MCUs reference manual (RM00316) available from the STMicroelectronics website www.st.com.
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Description 2 STM32F303x6/x8 Description The STM32F303x6/8 family incorporates the high-performance Arm® Cortex®-M4 32-bit RISC core operating at up to 72 MHz frequency embedding a floating point unit (FPU), high-speed embedded memories (up to 64 Kbytes of Flash memory, 12 Kbytes of SRAM), and an extensive range of enhanced I/Os and peripherals connected to two APB buses.
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STM32F303x6/x8 Description Table 2. STM32F303x6/8 family device features and peripherals count Peripheral Flash (Kbytes) STM32F303Kx STM32F303Cx STM32F303Rx 32 32 32 64 64 SRAM on data bus (Kbytes) 12 Core coupled memory SRAM on instruction bus (CCM SRAM) (Kbytes) 4 Timers Comm.
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Description STM32F303x6/x8 Figure 1. STM32F303x6/8 block diagram #9'' 6:-7$* )38 2EO )ODVK LQWHUIDFH 73,8 ,EXV &257(; 0 &38 'EXV ) PD[ 0+] 6\VWHP EXV 19,& %XV0DWUL[ -7567 -7', -7&. 6:&/. -706 6:'$7 -7'2 75$&(6:2 DV $) 'EXV 32:(5 9'' )ODVK .% ELWV 92/7 5(* 9 72 9 9 '' WR 9 9 66 #9''$ 65$0 .% #9''$ &&0 65$0 .
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STM32F303x6/x8 Functional overview 3 Functional overview 3.1 Arm® Cortex®-M4 core with FPU with embedded Flash memory and SRAM The Arm Cortex-M4 processor with FPU is the latest generation of Arm processors for embedded systems. It has been developed to provide a low-cost platform that meets the needs of MCU implementation, with a reduced pin count and low-power consumption, while delivering outstanding computational performance and an advanced response to interrupts.
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Functional overview 3.2.3 STM32F303x6/x8 Boot modes At startup, BOOT0 pin and BOOT1 option bit are used to select one of the three boot options: • Boot from user Flash memory • Boot from system memory • Boot from embedded SRAM The boot loader is located in system memory. It is used to reprogram the Flash memory by using USART1 (PA9/PA10), USART2 (PA2/PA3), I2C1 (PB6/PB7). 3.
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STM32F303x6/x8 3.4.2 Functional overview Power supply supervisor The device has an integrated power-on reset (POR) and power-down reset (PDR) circuits. They are always active, and ensure proper operation above a threshold of 2 V. The device remains in reset mode when the monitored supply voltage is below a specified threshold, VPOR/PDR, without the need for an external reset circuit. • The POR monitors only the VDD supply voltage.
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Functional overview STM32F303x6/x8 Standby mode, SRAM and register contents are lost except for registers in the Backup domain and Standby circuitry. The device exits Standby mode when an external reset (NRST pin), an IWDG reset, a rising edge on the WKUP pin, or an RTC alarm occurs. Note: The RTC, the IWDG, and the corresponding clock sources are not stopped by entering Stop or Standby mode. 3.5 Interconnect matrix Several peripherals have direct connections between them.
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STM32F303x6/x8 3.6 Functional overview Clocks and startup System clock selection is performed on startup, however the internal RC 8 MHz oscillator is selected on reset as default CPU clock. An external 4-32 MHz clock can be selected, in which case it is monitored for failure. If failure is detected, the system automatically switches back to the internal RC oscillator. A software interrupt is generated if enabled.
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Functional overview STM32F303x6/x8 Figure 2.
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STM32F303x6/x8 3.7 Functional overview General-purpose inputs/outputs (GPIOs) Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current capable except for analog inputs.
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Functional overview STM32F303x6/x8 independently. A pending register maintains the status of the interrupt requests. The EXTI can detect an external line with a pulse width shorter than the internal clock period. Up to 51 GPIOs can be connected to the 16 external interrupt lines. 3.10 Fast analog-to-digital converter (ADC) Two 5 MSPS fast analog-to-digital converters, with selectable resolution between 12 and 6 bit, are embedded in the STM32F303x6/8 family devices.
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STM32F303x6/x8 3.10.2 Functional overview Internal voltage reference (VREFINT) The internal voltage reference (VREFINT) provides a stable (bandgap) voltage output for the ADC and Comparators. VREFINT is internally connected to the ADC1_IN18 and ADC2_IN18 input channels. The precise voltage of VREFINT is individually measured for each part by ST during production test and stored in the system memory area. It is accessible in read-only mode. 3.10.
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Functional overview 3.13 STM32F303x6/x8 Ultra-fast comparators (COMP) The STM32F303x6/8 devices embed three ultra-fast rail-to-rail comparators (COMP2/4/6) that offer the features below: • Programmable internal or external reference voltage • Selectable output polarity. The reference voltage can be one of the following: • External I/O • DAC output • Internal reference voltage or submultiple (1/4, 1/2, 3/4).
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STM32F303x6/x8 3.14.1 Functional overview Advanced timer (TIM1) The advanced-control timer can be seen as a three-phase PWM multiplexed on 6 channels. They have complementary PWM outputs with programmable inserted dead-times. They can also be seen as complete general-purpose timers.
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Functional overview 3.14.3 STM32F303x6/x8 Basic timers (TIM6 and TIM7) The basic timers are mainly used for DAC trigger generation. They can also be used as generic 16-bit timebases. 3.14.4 Independent watchdog The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is clocked from an independent 40 kHz internal RC and as it operates independently from the main clock, it can operate in Stop and Standby modes.
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STM32F303x6/x8 Functional overview inaccuracy. • Two anti-tamper detection pins with programmable filter. The MCU can be woken up from Stop and Standby modes on tamper event detection. • Timestamp feature, which can be used to save the calendar content. This function can be triggered by an event on the timestamp pin, or by a tamper event. The MCU can be woken up from Stop and Standby modes on timestamp event detection.
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Functional overview STM32F303x6/x8 Table 7. STM32F303x6/8 I2C implementation I2C features(1) I2C1 7-bit addressing mode X 10-bit addressing mode X Standard mode (up to 100 kbit/s) X Fast mode (up to 400 kbit/s) X Fast Mode Plus with 20mA output drive I/Os (up to 1 Mbit/s) X Independent clock X SMBus X Wakeup from STOP X 1. X = supported. 3.16.
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STM32F303x6/x8 Functional overview Table 8. USART features (continued) USART1 USART2 USART3 Auto baud rate detection X - Driver Enable X X USART modes/features(1) 1. X = supported. 3.16.3 Serial peripheral interface (SPI) A SPI interface allows to communicate up to 18 Mbits/s in slave and master modes in fullduplex and simplex communication modes. The 3-bit prescaler gives 8 master mode frequencies and the frame size is configurable from 4 bits to 16 bits.
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Functional overview STM32F303x6/x8 Figure 3. Infrared transmitter 7,0(5 2& IRU HQYHORS 7,0(5 3% 3$ 2& IRU FDUULHU 06Y 9 3.18 Touch sensing controller (TSC) The STM32F303x6/8 devices provide a simple solution for adding capacitive sensing functionality to any application. These devices offer up to 18 capacitive sensing channels distributed over 6 analog I/Os group.
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STM32F303x6/x8 Functional overview Table 10. Capacitive sensing GPIOs available on STM32F303x6/8 devices (continued) Group 3 4 5 6 Capacitive sensing group name Pin name TSC_G3_IO1 PC5 TSC_G3_IO2 PB0 TSC_G3_IO3 PB1 TSC_G3_IO4 PB2 TSC_G4_IO1 PA9 TSC_G4_IO2 PA10 TSC_G4_IO3 PA13 TSC_G4_IO4 PA14 TSC_G5_IO1 PB3 TSC_G5_IO2 PB4 TSC_G5_IO3 PB6 TSC_G5_IO4 PB7 TSC_G6_IO1 PB11 TSC_G6_IO2 PB12 TSC_G6_IO3 PB13 TSC_G6_IO4 PB14 Table 11.
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Functional overview STM32F303x6/x8 Table 11. Capacitive sensing GPIO available (continued) Group Capacitive sensing group name Pin name TSC_G5_IO1 PB3 TSC_G5_IO2 PB4 TSC_G5_IO3 PB6 TSC_G5_IO4 PB7 TSC_G6_IO1 PB11 TSC_G6_IO2 PB12 TSC_G6_IO3 PB13 TSC_G6_IO4 PB14 5 6 Table 12. No.
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STM32F303x6/x8 4 Pinout and pin descriptions Pinout and pin descriptions 3$ 3% 3% 3% 3% 3% %227 966 Figure 4. LQFP32 pinout 9'' 3$ 3) 26&B287 3$ 3) 26&B,1 3$ 1567 3$ 9''$ 95() 3$ 3$ 3$ 3$ 3$ 3$ 9'' 966 3% 3% 3$ 3$ 3$ 3$ 3$ /4)3 06 9 1. The above figure shows the package top view.
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Pinout and pin descriptions STM32F303x6/x8 3$ 3$ 3& 3& 3& 3' 3% 3% 3% 3% 3% %227 3% 3% 966 9'' Figure 6.
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STM32F303x6/x8 Pinout and pin descriptions Figure 7. WLCSP49 ballout $ 3$ 3$ 3% 3% % 966 9'' 3% 3% 3% & 3$ 3$ 3$ 3$ 3& ' 3$ 3$ 3% 3& 3$ 3$ 1567 ( 3% 3% 3& 3$ 3$ 9''$ 966$ 95() ) 3% 3% 3% 3$ 3$ 966 95() * 3% 3% 3% 3& 3$ 9'' 3$ %227 3% 9'' 3% 966 3) 26&B287 3) 26&B,1 06Y 9 1. The above figure shows the package top view.
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Pinout and pin descriptions STM32F303x6/x8 Table 13. Legend/abbreviations used in the pinout table Name Abbreviation Unless otherwise specified in brackets below the pin name, the pin function during and after reset is the same as the actual pin name Pin name Pin type I/O structure S Supply pin I Input only pin I/O Input / output pin FT 5 V tolerant I/O FTf 5 V tolerant I/O, FM+ capable TTa 3.3 V tolerant I/O directly connected to ADC TT 3.3 V tolerant I/O TC Standard 3.
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STM32F303x6/x8 Pinout and pin descriptions Table 14.
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Pinout and pin descriptions STM32F303x6/x8 12 16 22 E4 Pin name (function after reset) PA6(3) Pin type WLCSP49 LQFP64 LQFP48 LQFP32 Pin Number I/O I/O structure Table 14.
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STM32F303x6/x8 Pinout and pin descriptions Table 14.
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Pinout and pin descriptions STM32F303x6/x8 Pin name (function after reset) Pin type WLCSP49 LQFP64 LQFP48 LQFP32 Pin Number I/O structure Table 14.
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STM32F303x6/x8 Pinout and pin descriptions 1. Pin name (function after reset) Pin type WLCSP49 LQFP64 LQFP48 LQFP32 Pin Number I/O structure Table 14. STM32F303x6/8 pin definitions (continued) Pin functions Alternate functions Additional functions - - 46 62 A6 PB9 I/O FTf TIM17_CH1, I2C1_SDA, IR_OUT, USART3_TX, COMP2_OUT, CAN_TX, EVENTOUT 32 47 63 B7 VSS S - - - 1 48 64 A7 VDD S - - - PC13, PC14 and PC15 are supplied through the power switch.
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Memory mapping 5 STM32F303x6/x8 Memory mapping Figure 8. STM32F303x6/8 memory map [ )) $+% [)))) )))) &RUWH[ 0 ZLWK )38 ,QWHUQDO 3HULSKHUDOV [( [ 5HVHUYHG [ $+% [ 5HVHUYHG [ )) $+% [& [ 5HVHUYHG [ & $3% [$ [ 5HVHUYHG [ $ $3% [ [ [ ))) )))) 2SWLRQ E\WHV [ [ ))) ) 6\VWHP PHPRU\ [ [ ))) ' 3HULSKHUDOV [
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STM32F303x6/x8 Memory mapping - Table 16.
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Memory mapping STM32F303x6/x8 Table 16. STM32F303x6/8 peripheral register boundary addresses (continued) Bus APB1 44/121 Downloaded from Arrow.com.
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STM32F303x6/x8 Electrical characteristics 6 Electrical characteristics 6.1 Parameter conditions Unless otherwise specified, all voltages are referenced to VSS. 6.1.1 Minimum and maximum values Unless otherwise specified, the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage and frequencies by tests in production on 100% of the devices with an ambient temperature at TA = 25 °C and TA = TAmax (given by the selected temperature range).
PAGE 46
Electrical characteristics 6.1.6 STM32F303x6/x8 Power-supply scheme Figure 11. Power-supply scheme 9%$7 *3,2V ,1 9'' [ 9'' 9''$ /HYHO VKLIWHU 287 [ Q) [ ) %DFNXS FLUFXLWU\ /6( 57& :DNH XS ORJLF %DFNXS UHJLVWHUV 3RZHU VZLWFK 9 , 2 /RJLF .HUQHO ORJLF &38 'LJLWDO 0HPRULHV 5HJXODWRU [ 9 66 9''$ Q) ) 9 5() 95() $'& '$& $QRORJ 5&V 3// FRPSDUDWRUV 23$03 966$ 06 9 Caution: 46/121 Downloaded from Arrow.com.
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STM32F303x6/x8 6.1.7 Electrical characteristics Measurement of the current consumption Figure 12. Scheme of the current-consumption measurement , ''B9%$7 9%$7 ,'' 9'' ,''$ 9''$ 06 9 DocID025083 Rev 7 47/121 101 Downloaded from Arrow.com.
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Electrical characteristics 6.2 STM32F303x6/x8 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 17: Voltage characteristics, Table 18: Current characteristics, and Table 19: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect the device reliability. Table 17.
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STM32F303x6/x8 Electrical characteristics Table 18. Current characteristics Symbol Ratings Max.
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Electrical characteristics STM32F303x6/x8 6.3 Operating conditions 6.3.1 General operating conditions Table 20. General operating conditions Symbol Parameter Conditions Min. Max. Unit fHCLK Internal AHB clock frequency - 0 72 fPCLK1 Internal APB1 clock frequency - 0 36 fPCLK2 Internal APB2 clock frequency - 0 72 Standard operating voltage - 2 3.6 2 3.6 2.4 3.6 1.65 3.6 TC I/O –0.3 VDD+0.3 TT I/O -0.3 3.6 –0.3 VDDA+0.3 –0.3 5.5 0 5.
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STM32F303x6/x8 6.3.2 Electrical characteristics Operating conditions at power-up / power-down The parameters given in Table 21 are derived from tests performed under the ambient temperature condition summarized in Table 20. Table 21. Operating conditions at power-up / power-down Symbol Parameter VDD rise time rate tVDD - VDD fall time rate VDDA rise time rate tVDDA 6.3.3 Conditions Max. Unit 0 ∞ ∞ ∞ ∞ µs/V 20 0 - VDDA fall time rate Min.
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Electrical characteristics STM32F303x6/x8 Table 23. Programmable voltage detector characteristics Symbol Parameter VPVD0 PVD threshold 0 VPVD1 PVD threshold 1 VPVD2 PVD threshold 2 VPVD3 PVD threshold 3 Conditions Min.(1) Typ. Max.(1) Rising edge 2.1 2.18 2.26 Falling edge 2 2.08 2.16 Rising edge 2.19 2.28 2.37 Falling edge 2.09 2.18 2.27 Rising edge 2.28 2.38 2.48 Falling edge 2.18 2.28 2.38 Rising edge 2.38 2.48 2.58 Falling edge 2.28 2.38 2.
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STM32F303x6/x8 Electrical characteristics Table 25. Internal reference voltage calibration values Calibration value name VREFINT_CAL 6.3.5 Description Raw data acquired at temperature of 30 °C VDDA= 3.
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Electrical characteristics STM32F303x6/x8 Table 26. Typical and maximum current consumption from VDD supply at VDD = 3.6V All peripherals enabled Symbol Parameter Conditions Supply current in Run mode, executing from Flash External clock (HSE bypass) Internal clock (HSI) IDD Supply current in Run mode, executing from RAM External clock (HSE bypass) Internal clock (HSI) IDD Supply current in Sleep mode, executing from Flash or RAM External clock (HSE bypass) Internal clock (HSI) fHCLK Typ.
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STM32F303x6/x8 Electrical characteristics Table 27. Typical and maximum current consumption from the VDDA supply VDDA = 2.4 V Symbol Parameter IDDA Supply current in Run/Sleep mode, code executing from Flash or RAM Conditions (1) HSE bypass HSI clock fHCLK Typ. Max. @ VDDA = 3.6 V TA(2) 25 °C 85 °C 105 °C (3) (3) Typ. Max.
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Electrical characteristics STM32F303x6/x8 Table 29. Typical and maximum VDDA consumption in Stop and Standby modes Symbo Parameter l Supply current in Standby mode Conditions VDDA supervisor ON Supply current in Stop mode Supply current in Standby mode VDDA supervisor OFF IDDA Supply current in Stop mode Max.(1) Typ. @VDD (VDD = VDDA) TA = TA = TA = 2.0 V 2.4 V 2.7 V 3.0 V 3.3 V 3.6 V 25 °C 85 °C 105 °C Regulator in run/low-power mode, all oscillators OFF 1.67 1.79 1.91 2.04 2.19 2.35 2.
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STM32F303x6/x8 Electrical characteristics Figure 13. Typical VBAT current consumption (LSE and RTC ON/LSEDRV[1:0] = ’00’) 9 , 9%$7 $ 9 9 9 9 9 9 9 & & & & 7$ & 06 9 Typical current consumption The MCU is placed under the following conditions: • VDD = VDDA = 3.
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Electrical characteristics STM32F303x6/x8 Table 31. Typical current consumption in Run mode, code with data processing running from Flash memory Typ. Symbol IDD Parameter Conditions Supply current in Run mode from VDD supply Running from HSE crystal clock 8 MHz, code executing from Flash memory IDDA(1) (2) Supply current in Run mode from VDDA supply fHCLK Peripherals enabled Peripherals disabled 72 MHz 47.2 25.2 64 MHz 39.5 22.6 48 MHz 30.4 17.3 32 MHz 20.9 12.0 24 MHz 17.3 9.
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STM32F303x6/x8 Electrical characteristics Table 32. Typical current consumption in Run mode, code with data processing running from Flash memory Typ. Symbol IDD Parameter Conditions Supply current in Run mode from VDD supply Running from HSE crystal clock 8 MHz, code executing from Flash memory IDDA(1) (2) Supply current in Run mode from VDDA supply fHCLK Peripherals enabled Peripherals disabled 72 MHz 70.6 25.2 64 MHz 60.3 22.6 48 MHz 46.0 17.3 32 MHz 31.3 12.0 24 MHz 25.0 9.
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Electrical characteristics STM32F303x6/x8 Table 33. Typical current consumption in Sleep mode, code running from Flash or RAM Typ. Symbol IDD Parameter Conditions Supply current in Sleep mode from VDD supply Running from HSE crystal clock 8 MHz, code executing from Flash memory or RAM IDDA(1) (2) Supply current in Sleep mode from VDDA supply fHCLK Peripherals enabled Peripherals disabled 72 MHz 28.5 6.3 64 MHz 25.6 5.7 48 MHz 19.5 4.40 32 MHz 13.3 3.13 24 MHz 10.2 2.49 16 MHz 7.
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STM32F303x6/x8 Electrical characteristics For the output pins, any external pull-down or external load must also be considered to estimate the current consumption. Additional I/O current consumption is due to I/Os configured as inputs if an intermediate voltage level is externally applied. This current consumption is caused by the input Schmitt trigger circuits used to discriminate the input value.
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Electrical characteristics STM32F303x6/x8 The test pin is configured in push-pull output mode and is toggled by software at a fixed frequency. Table 34. Switching output I/O current consumption Symbol Parameter Conditions(1) VDD =3.3 V Cext = 0 pF C = CINT + CEXT+ CS VDD = 3.3 V Cext = 10 pF C = CINT + CEXT +CS ISW I/O current consumption VDD = 3.3 V Cext = 22 pF C = CINT + CEXT +CS VDD = 3.3 V Cext = 33 pF C = CINT + CEXT+ CS VDD = 3.3 V Cext = 47 pF C = CINT + CEXT+ CS 1.
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STM32F303x6/x8 Electrical characteristics On-chip peripheral current consumption The MCU is placed under the following conditions: • All I/O pins are in analog input configuration • All peripherals are disabled unless otherwise mentioned • The given value is calculated by measuring the current consumption: • – With all peripherals clocked off – With only one peripheral clocked on Ambient operating temperature at 25°C and VDD = VDDA = 3.3 V Table 35.
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Electrical characteristics STM32F303x6/x8 Table 35. Peripheral current consumption (continued) Typical consumption(1) Peripheral Unit IDD CAN 31.3 - PWR 4.7 - DAC 15.4 - DAC2 8.6 - SPI1 8.2 - 1. The power consumption of the analog part (IDDA) of peripherals such as ADC, DAC, Comparators, OpAmp and others, is not included. Refer to the tables of characteristics in the subsequent sections. 2. BusMatrix is automatically active when at least one master is ON (CPU or DMA1). 3.
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STM32F303x6/x8 6.3.6 Electrical characteristics Wakeup time from low-power mode The wakeup times given in Table 36 are measured starting from the wakeup event trigger up to the first instruction executed by the CPU: • For Stop or Sleep mode: the wakeup event is WFE. • WKUP1 (PA0) pin is used to wake up from Standby, Stop and Sleep modes. All timings are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 20. Table 36.
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Electrical characteristics STM32F303x6/x8 Table 38. High-speed external user clock characteristics Symbol Parameter Conditions fHSE_ext User external clock source frequency(1) VHSEH OSC_IN input pin high-level voltage VHSEL OSC_IN input pin low-level voltage tw(HSEH) tw(HSEL) tr(HSE) tf(HSE) Min. Typ. Max. Unit 1 8 32 MHz 0.7VDD - VDD VSS - 0.3VDD 15 - - - OSC_IN high or low time(1) V ns OSC_IN rise or fall time (1) - - 20 1.
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STM32F303x6/x8 Electrical characteristics Figure 15. Low-speed external clock source AC timing diagram WZ /6(+ 9/6(+ 9/6(/ WU /6( WI /6( W WZ /6(/ 7/6( 06 9 High-speed external clock generated from a crystal/ceramic resonator The high-speed external (HSE) clock can be supplied with a 4 to 32 MHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on design simulation results obtained with typical external components specified in Table 40.
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Electrical characteristics STM32F303x6/x8 For CL1 and CL2, it is recommended to use high-quality external ceramic capacitors in the 5 pF to 25 pF range (typ.), designed for high-frequency applications, and selected to match the requirements of the crystal or resonator (see Figure 16). CL1 and CL2 are usually the same size. The crystal manufacturer typically specifies a load capacitance which is the series combination of CL1 and CL2.
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STM32F303x6/x8 Electrical characteristics Table 41. LSE oscillator characteristics (fLSE = 32.768 kHz) (continued) Symbol gm Conditions(1) Min.(2) Typ. Max.(2) LSEDRV[1:0]=00 lower-driving capability 5 - - LSEDRV[1:0]=10 medium low-driving capability 8 - - LSEDRV[1:0]=01 medium high-driving capability 15 - - LSEDRV[1:0]=11 higher-driving capability 25 - - VDD is stabilized - 2 - Parameter Oscillator transconductance tSU(LSE)(3) Startup time Unit µA/V s 1.
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Electrical characteristics STM32F303x6/x8 High-speed internal (HSI) RC oscillator Table 42. HSI oscillator characteristics(1) Symbol Parameter fHSI Conditions Min. Typ. - - Frequency TRIM HSI user trimming step DuCy(HSI) Duty cycle Accuracy of the HSI oscillator (factory calibrated) ACCHSI - - - (2) 45 Max. Unit 8 - MHz - (2) - 55 (2) TA = –40 to 105 °C (3) –2.8 - 3.8 TA = –10 to 85 °C –1.9(3) - 2.3(3) TA = 0 to 85 °C -1.9(3) - 2(3) TA = 0 to 70 °C -1.
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STM32F303x6/x8 Electrical characteristics Low-speed internal (LSI) RC oscillator Table 43. LSI oscillator characteristics(1) Symbol fLSI tsu(LSI) Parameter Min. Typ. Max. Unit 30 40 50 kHz LSI oscillator startup time - - 85 µs LSI oscillator power consumption - 0.75 1.2 µA Frequency (2) IDD(LSI)(2) 1. VDDA = 3.3 V, TA = –40 to 105 °C unless otherwise specified. 2. Guaranteed by design, not tested in production. 6.3.
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Electrical characteristics 6.3.10 STM32F303x6/x8 Memory characteristics Flash memory The characteristics are given at TA = –40 to 105 °C unless otherwise specified. Table 45. Flash memory characteristics Min. Typ. Max.(1) Unit 16-bit programming time TA = –40 to +105 °C 40 53.
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STM32F303x6/x8 Electrical characteristics Table 47. EMS characteristics Symbol Parameter Conditions Level/ Class VFESD VDD = 3.3 V, LQFP100, TA = Voltage limits to be applied on any I/O pin to +25°C, induce a functional disturbance fHCLK = 72 MHz conforms to IEC 61000-4-2 2B VEFTB Fast transient voltage burst limits to be applied through 100 pF on VDD and VSS pins to induce a functional disturbance VDD = 3.
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Electrical characteristics STM32F303x6/x8 Table 48. EMI characteristics Symbol Parameter SEMI 6.3.12 Max vs. [fHSE/fHCLK] Monitored frequency band Conditions VDD = 3.6 V, TA =25 °C, LQFP100 package Peak level compliant with IEC 61967-2 Unit 8/72 MHz 0.
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STM32F303x6/x8 6.3.13 Electrical characteristics I/O current injection characteristics As a general rule, current injection to the I/O pins, due to external voltage below VSS or above VDD (for standard, 3 V-capable I/O pins) should be avoided during normal product operation. However, to give an indication of the robustness of the microcontroller in cases when abnormal injection accidentally happens, susceptibility tests are performed on a sample basis during device characterization.
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Electrical characteristics STM32F303x6/x8 Table 51.
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STM32F303x6/x8 Electrical characteristics Table 52. I/O static characteristics (continued) Symbol Parameter Input leakage current (3) Ilkg Conditions Min. Typ. Max. TC, FT, TT, FTf and TTa I/O in digital mode VSS ≤VIN ≤VDD - - ±0.1 TTa I/O in digital mode VDD ≤VIN ≤VDDA - - 1 TTa I/O in analog mode VSS ≤VIN ≤VDDA - - ±0.
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Electrical characteristics STM32F303x6/x8 Figure 20. TC and TTa I/O input characteristics - TTL port 9,/ 9,+ 9 WLRQV OD 9 '' Q VLPX 9 ,+PLQ RQ GHVLJ G %DVH 77/ VWDQGDUG UHTXLUHPHQWV 9 ,+PLQ 9 9,+PLQ V XODWLRQ ' 9 ' VLJQ VLP H Q G VHG R 9 ,/PD[ %D $UHD QRW GHWHUPLQHG 9,/PD[ 77/ VWDQGDUG UHTXLUHPHQWV 9 ,/PD[ 9 9'' 9 06 9 Figure 21.
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STM32F303x6/x8 Electrical characteristics Output driving current The GPIOs (general-purpose input/output) can sink or source up to +/-8 mA, and sink or source up to +/- 20 mA (with a relaxed VOL/VOH). In the user application, the number of I/O pins which can drive current must be limited to respect the absolute maximum rating specified in Section 6.
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Electrical characteristics STM32F303x6/x8 Table 54. I/O AC characteristics(1) OSPEEDRy [1:0] value(1) x0 01 Symbol Parameter fmax(IO)out Maximum frequency(2) tf(IO)out Output high to low-level fall time tr(IO)out Output low to high-level rise time fmax(IO)out Maximum frequency(2) tf(IO)out Output high to low-level fall time tr(IO)out Output low to high-level rise time Conditions CL = 50 pF, VDD = 2 V to 3.
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STM32F303x6/x8 Electrical characteristics Figure 23. I/O AC characteristics definition (;7(51$/ 287387 21 &/ WU ,2 RXW WI ,2 RXW 7 0D[LPXP IUHTXHQF\ LV DFKLHYHG LI WU WI 7 DQG LI WKH GXW\ F\FOH LV ZKHQ ORDGHG E\ &/ VSHFLILHG LQ WKH WDEOH ³ , 2 $& FKDUDFWHULVWLFV´ 6.3.15 DL G NRST pin characteristics The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up resistor, RPU (see Table 52).
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Electrical characteristics STM32F303x6/x8 Figure 24. Recommended NRST pin protection ([WHUQDO UHVHW FLUFXLW 9'' 1567 538 ,QWHUQDO UHVHW )LOWHU ) 06 9 1. The reset network protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 55. Otherwise the reset will not be taken into account by the device. 3. The external capacitor on NRST must be placed as close as possible to the device. 4.
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STM32F303x6/x8 6.3.16 Electrical characteristics Timer characteristics The parameters given in Table 56 are guaranteed by design. Refer to Section 6.3.14: I/O port characteristics for details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output). Table 56. TIMx(1)(2) characteristics Symbol tres(TIM) fEXT ResTIM tCOUNTER Parameter Timer resolution time Conditions Min. Max. Unit - 1 - tTIMxCLK fTIMxCLK = 72 MHz 13.
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Electrical characteristics STM32F303x6/x8 Table 57. IWDG min./max. timeout period at 40 kHz (LSI) (1) Prescaler divider PR[2:0] bits Min. timeout (ms) RL[11:0] = 0x000 Max. timeout (ms) RL[11:0] = 0xFFF /4 0 0.1 409.6 /8 1 0.2 819.2 /16 2 0.4 1638.4 /32 3 0.8 3276.8 /64 4 1.6 6553.6 /128 5 3.2 13107.2 /256 7 6.4 26214.4 1. These timings are given for a 40 kHz clock but the microcontroller’s internal RC frequency can vary from 30 to 60 kHz.
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STM32F303x6/x8 Electrical characteristics Table 59. I2C analog filter characteristics(1) Symbol Parameter Min. Max. Unit tAF Maximum pulse width of spikes that are suppressed by the analog filter. 50(2) 260(3) ns 1. Guaranteed by design, not tested in production. 2. Spikes with width below tAF(min.) are filtered. 3. Spikes with width above tAF(max.) are not filtered.
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Electrical characteristics STM32F303x6/x8 Figure 25. SPI timing diagram - slave mode and CPHA = 0 Figure 26. SPI timing diagram - slave mode and CPHA = 1(1) 166 LQSXW 6&. LQSXW W68 166 &3+$ &32/ &3+$ &32/ WZ 6&.+ WZ 6&./ WK 62 WY 62 WD 62 0,62 287387 06% 287 %,7 287 WU 6&. WI 6&. WGLV 62 /6% 287 WK 6, WVX 6, 026, ,1387 WK 166 WF 6&. 06% ,1 %,7 ,1 /6% ,1 DL E 1. Measurement points are done at 0.5VDD and with external CL = 30 pF. 86/121 Downloaded from Arrow.com.
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STM32F303x6/x8 Electrical characteristics Figure 27. SPI timing diagram - master mode(1) +LJK 166 LQSXW 6&. 2XWSXW 6&. 2XWSXW WF 6&. &3+$ &32/ &3+$ &32/ &3+$ &32/ &3+$ &32/ WVX 0, 0,62 ,13 87 WZ 6&.+ WZ 6&./ WU 6&. WI 6&. %,7 ,1 06% ,1 /6% ,1 WK 0, 026, 287387 % , 7 287 06% 287 WY 02 /6% 287 WK 02 DL F 1. Measurement points are done at 0.5VDD and with external CL = 30 pF. CAN (controller area network) interface Refer to Section 6.3.
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Electrical characteristics STM32F303x6/x8 Table 61. ADC characteristics (continued) Symbol fADC fS fTRIG Parameter ADC clock frequency Sampling rate External trigger frequency Conditions Min. Typ. Max. Unit - 0.14 - 72 MHz Resolution = 12 bits, Fast Channel 0.01 - 5.14 Resolution = 10 bits, Fast Channel 0.012 - 6 Resolution = 8 bits, Fast Channel 0.014 - 7.2 Resolution = 6 bits, Fast Channel 0.0175 - 9 fADC = 72 MHz Resolution = 12 bits - - 5.
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STM32F303x6/x8 Electrical characteristics Table 61. ADC characteristics (continued) Symbol Parameter Total conversion time (including sampling time) tCONV Common Mode Input signal CMIR Conditions Min. Typ. Max. Unit fADC = 72 MHz Resolution = 12 bits 0.19 - 8.52 µs 14 to 614 (tS for sampling + 12.5 for successive approximation) Resolution = 12 bits (VSSA+VREF+)/ (VSSA + 2-0.18 VREF+)/2 ADC differential mode 1/fADC (VSSA + VREF+)/2 + 0.18 V $'& FXUUHQW FRQVXPSWLRQ $ Figure 28.
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Electrical characteristics STM32F303x6/x8 Table 62. Maximum ADC RAIN(1) (continued) Resolution 10 bits 8 bits 6 bits RAIN max. (kΩ) Sampling cycle @ 72 MHz Sampling time [ns] @ 72 MHz Fast channels(2) Slow channels Other channels(3) 1.5 20.83 0.082 NA NA 2.5 34.72 0.270 0.082 0.100 4.5 62.50 0.560 0.390 0.330 7.5 104.17 1.20 0.82 0.68 19.5 270.83 3.30 2.70 2.20 61.5 854.17 10.0 8.2 6.8 181.5 2520.83 33.0 27.0 22.0 601.5 8354.17 100.0 82.0 68.0 1.5 20.
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STM32F303x6/x8 Electrical characteristics Table 63. ADC accuracy - limited test conditions(1)(2) Symbol Parameter ET EO Total unadjusted error Offset error ±4 ±4.5 Slow channel 4.8 Ms - ±5.5 ±6 Fast channel 5.1 Ms - ±3.5 ±4 Slow channel 4.8 Ms - ±3.5 ±4 Fast channel 5.1 Ms - ±2 ±2 Slow channel 4.8 Ms - ±1.5 ±2 Fast channel 5.1 Ms - ±1.5 ±2 Slow channel 4.8 Ms - ±1.5 ±2 Fast channel 5.1 Ms - ±3 ±4 Slow channel 4.8 Ms - ±5 ±5.5 Fast channel 5.
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Electrical characteristics STM32F303x6/x8 Table 63. ADC accuracy - limited test conditions(1)(2) (continued) Symbol Parameter SNR(4) THD(4) Signal-tonoise ratio Total harmonic distortion Min. Conditions Typ. Max.(3) Unit (3) Fast channel 5.1 Ms 66 67 - Slow channel 4.8 Ms 66 67 - Fast channel 5.1 Ms ADC clock freq. ≤ 72 MHz Differential Slow channel 4.8 Ms Sampling freq. ≤ 5 Msps VDDA = 3.3 V Fast channel 5.1 Ms Single 25°C ended Slow channel 4.
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STM32F303x6/x8 Electrical characteristics Table 64. ADC accuracy (1)(2)(3) (continued) Symbol Parameter EL ENOB (5) SINAD (5) SNR(5) THD(5) Single ended Integral linearity error Effective number of bits Differential ADC clock freq. ≤ 72 MHz, Sampling freq. ≤ 5 Msps 2.0 V ≤ VDDA ≤ 3.6 V Single ended Differential Single ended Signal-tonoise and distortion ratio Differential Single ended Signal-tonoise ratio Total harmonic distortion Min.(4) Max.(4) Fast channel 5.
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Electrical characteristics STM32F303x6/x8 Table 65. ADC accuracy(1)(2) at 1MSPS Symbol Parameter ET Total unadjusted error EO Offset error Typ. Max(3) Fast channel ±2.5 ±5 Slow channel ±3.5 ±5 Fast channel ±1 ±2.5 Slow channel ±1.5 ±2.5 Fast channel ±2 ±3 Slow channel ±3 ±4 Fast channel ±0.7 ±2 Slow channel ±0.7 ±2 Fast channel ±1 ±3 Slow channel ±1.2 ±3 Test conditions ADC Freq. ≤ 72 MHz Sampling Freq. ≤ 1MSPS 2 V ≤ VDDA = VREF+ ≤ 3.
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STM32F303x6/x8 Electrical characteristics Figure 30. Typical connection diagram using the ADC 9'' 6DPSOH DQG KROG $'& FRQYHUWHU 97 9 5$,1 9$,1 5$'& $,1[ 97 9 &SDUDVLWLF ELW FRQYHUWHU ,/ $ &$'& 06 9 1. Refer to Table 61 for the values of RAIN. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy.
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Electrical characteristics STM32F303x6/x8 Table 66. DAC characteristics (continued) Symbol Min. Typ. Max. Unit Given for a 10-bit input code DAC1 channel 1 - - ±0.5 LSB Given for a 12-bit input code DAC1 channel 1 - - ±2 LSB Given for a 10-bit input code DAC1 channel 2 & DAC2 channel 1 - - -0.75/+0.
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STM32F303x6/x8 Electrical characteristics Figure 31. 12-bit buffered /non-buffered DAC %XIIHUHG 1RQ EXIIHUHG '$& %XIIHU 5 / '$&B287[ ELW GLJLWDO WR DQDORJ FRQYHUWHU & / AI 6 1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the DAC_CR register. 6.3.20 Comparator characteristics Table 67.
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Electrical characteristics STM32F303x6/x8 Figure 32. Maximum VREFINT scaler startup time from power-down 6.3.21 Operational amplifier characteristics Table 68. Operational amplifier characteristics(1) Symbol Parameter Condition Min. Typ. Max. Unit VDDA Analog supply voltage - 2.4 - 3.6 V CMIR Common mode input range - 0 - VDDA V - - 4 - - 6 25°C, No Load on output. - - 1.6 All voltage/Temp. - - 3 VIOFFSET Input offset voltage 25°C, No Load on output.
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STM32F303x6/x8 Electrical characteristics Table 68. Operational amplifier characteristics(1) (continued) Symbol VOHSAT VOLSAT ϕm tOFFTRIM tWAKEUP Parameter Condition High saturation voltage(2) Low saturation voltage Min. Typ. Rload = min, Input at VDDA. VDDA-100 - Rload = 20K, Input at VDDA. VDDA-20 - Rnetwork PGA gain error Ibias PGA BW Unit mV Rload = min, input at 0 V - - 100 Rload = 20K, input at 0 V.
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Electrical characteristics STM32F303x6/x8 Table 68. Operational amplifier characteristics(1) (continued) Symbol en Parameter Voltage noise density Condition Min. Typ. Max. @ 1KHz, Output loaded with 4 KΩ - 109 - @ 10KHz, Output loaded with 4 KΩ - 43 1. Guaranteed by design, not tested in production. 2. The saturation voltage can also be limited by the Iload. 3. R2 is the internal resistance between OPAMP output and OPAMP inverting input.
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STM32F303x6/x8 6.3.22 Electrical characteristics Temperature sensor (TS) characteristics Table 69. Temperature sensor (TS) characteristics Symbol Parameter TL(1) Min. Typ. Max. Unit - ±1 ±2 °C Average slope 4.0 4.3 4.6 mV/°C Voltage at 25 °C 1.34 1.43 1.52 V 4 - 10 µs 2.2 - - µs VSENSE linearity with temperature (1) Avg_Slope V25 tSTART(1) TS_temp(1)(2) Startup time ADC sampling time when reading the temperature 1. Guaranteed by design, not tested in production. 2.
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Package information STM32F303x6/x8 7 Package information 7.1 Package mechanical data To meet the environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 102/121 Downloaded from Arrow.com.
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STM32F303x6/x8 7.2 Package information LQFP32 package information LQFP32 is a 32-pin, 7 x 7mm low-profile quad flat package. Figure 34. LQFP32 package outline C ! ! ! 3%!4).' 0,!.% # MM CCC '!5'% 0,!.% # + $ ! , $ , $ 0). )$%.4)&)#!4)/. % % % B E 7@.&@7 1. Drawing is not to scale. Table 72. LQFP32 mechanical data Inches(1) Millimeters Symbol Min. Typ. Max. Min. Typ. Max. A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.
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Package information STM32F303x6/x8 Table 72. LQFP32 mechanical data (continued) Inches(1) Millimeters Symbol Min. Typ. Max. Min. Typ. Max. b 0.300 0.370 0.450 0.0118 0.0146 0.0177 c 0.090 - 0.200 0.0035 - 0.0079 D 8.800 9.000 9.200 0.3465 0.3543 0.3622 D1 6.800 7.000 7.200 0.2677 0.2756 0.2835 D3 - 5.600 - - 0.2205 - E 8.800 9.000 9.200 0.3465 0.3543 0.3622 E1 6.800 7.000 7.200 0.2677 0.2756 0.2835 E3 - 5.600 - - 0.2205 - e - 0.800 - - 0.
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STM32F303x6/x8 Package information Device marking for LQFP32 The following figure gives an example of topside marking orientation versus pin 1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 36. LQFP32 marking example (package top view) 3URGXFW ,GHQWLILFDWLRQ 670 ) . 7 < :: 5HYLVLRQ FRGH 5 3LQ LQGHQWLILHU 06Y 9 1.
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Package information 7.3 STM32F303x6/x8 LQFP48 package information LQFP48 is a 48-pin, 7 x 7mm low-profile quad flat package. Figure 37. LQFP48 package outline C ! ! ! 3%!4).' 0,!.% # MM '!5'% 0,!.% CCC # + ! $ $ , , $ 0). )$%.4)&)#!4)/. % % % B E "?-%?6 1. Drawing is not to scale. Table 73. LQFP48 package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.
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STM32F303x6/x8 Package information Table 73. LQFP48 package mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max E 8.800 9.000 9.200 0.3465 0.3543 0.3622 E1 6.800 7.000 7.200 0.2677 0.2756 0.2835 E3 - 5.500 - - 0.2165 - e - 0.500 - - 0.0197 - L 0.450 0.600 0.750 0.0177 0.0236 0.0295 L1 - 1.000 - 0.0394 - k 0° 3.5° 7° 0° 3.5° 7° ccc - - 0.080 - - 0.0031 1.
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Package information STM32F303x6/x8 Device marking for LQFP48 The following figure gives an example of topside marking orientation versus pin 1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 39. LQFP48 marking example (package top view) 3URGXFW ,GHQWLILFDWLRQ 670 ) & 7 < :: 5HYLVLRQ FRGH 5 3LQ LQGHQWLILHU 06Y 9 1.
PAGE 109
STM32F303x6/x8 7.4 Package information LQFP64 package information LQFP64 is a 64-pin, 10 x 10 mm low-profile quad flat package. Figure 40. LQFP64 package outline PP *$8*( 3/$1( F $ $ $ 6($7,1* 3/$1( & $ FFF & ' ' ' . / / ( ( ( E 3,1 ,'(17,),&$7,21 H :B0(B9 1. Drawing is not to scale. Table 74. LQFP64 package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.
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Package information STM32F303x6/x8 Table 74. LQFP64 package mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max θ 0° 3.5° 7° 0° 3.5° 7° L 0.450 0.600 0.750 0.0177 0.0236 0.0295 L1 - 1.000 - - 0.0394 - Number of pins N 64 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 41. Recommended footprint for the LQFP64 package AI C 1.
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STM32F303x6/x8 Package information Device marking for LQFP64 The following figure gives an example of topside marking orientation versus pin 1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 42. LQFP64 marking example (package top view) 5HYLVLRQ FRGH 5 (QJLQHHULQJ 6DPSOH PDUNLQJ 670 ) 5 7 3LQ LQGHQWLILHU < :: 06Y 9 1.
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Package information 7.5 STM32F303x6/x8 WLCSP49 package information Figure 43. WLCSP - 49 ball, 3.89x3.74 mm, 0.5 mm pitch, wafer level chip scale, package outline EEE = ) * $ %$// /2&$7,21 H $ $ '(7$,/ $ ( H ( H * DDD H $ 723 9,(: %27720 9,(: $ $ ' ' 6,'( 9,(: $ %803 )5217 9,(: $ 6($7,1* 3/$1( '(7$,/ $ 527$7(' % )B:/&63 B0(B9 1. Dimension is measured at the maximum bump diameter parallel to primary datum Z. 2.
PAGE 113
STM32F303x6/x8 Package information Table 75. WLCSP - 49 ball, 3.89x3.74 mm, 0.5 mm pitch, wafer level chip scale, mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 0.62 - - 0.0244 A1 - 0.23 - - 0.009 - A2 - 0.36 - - 0.014 - A3 - 0.025(2) - - 0.001 - b 0.30 0.33 0.36 0.012 0.013 0.014 D 3.87 3.89 3.91 0.152 0.153 0.154 E 3.72 3.74 3.76 0.146 0.147 0.148 e - 0.50 - - 0.020 - e1 - 3.00 - - 0.118 - e2 - 3.
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Package information STM32F303x6/x8 Table 76. WLCSP - 49 ball, 3.89x3.74 mm, 0.5 mm pitch, wafer level chip scale, recommended PCB design rules Dimension 114/121 Downloaded from Arrow.com. Recommended values Pitch 0.5 mm Dpad 0.290 mm Dsm 0.350 mm typ. (depends on the soldermask registration tolerance) Stencil opening 0.310 mm Stencil thickness 0.
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STM32F303x6/x8 Package information Device marking The following figure gives an example of topside marking orientation versus ball A1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 45. WLCSP49 marking example (package top view) 1. Parts marked as ES or E or accompanied by an Engineering Sample notification letter are not yet qualified and therefore not approved for use in production.
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Package information 7.6 STM32F303x6/x8 Thermal characteristics The maximum chip-junction temperature, TJ max, in degrees Celsius, may be calculated using the following equation: TJ max = TA max + (PD max x ΘJA) Where: • TA max is the maximum ambient temperature in ° C, • ΘJA is the package junction-to-ambient thermal resistance, in ° C/W, • PD max is the sum of PINT max and PI/O max (PD max = PINT max + PI/O max), • PINT max is the product of IDD and VDD, expressed in Watts.
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STM32F303x6/x8 Package information Example: high-performance application Assuming the following application conditions: Maximum ambient temperature TAmax = 82 °C (measured according to JESD51-2), IDDmax = 50 mA, VDD = 3.5 V, maximum 20 I/Os used at the same time in output at low level with IOL = 8 mA, VOL= 0.4 V and maximum 8 I/Os used at the same time in output mode at low level with IOL = 20 mA, VOL= 1.3 V PINTmax = 50 mA × 3.5 V = 175 mW PIOmax = 20 × 8 mA × 0.4 V + 8 × 20 mA × 1.
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Part numbering 8 STM32F303x6/x8 Part numbering Table 78.
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STM32F303x6/x8 9 Revision history Revision history Table 79. Document revision history Date Revision 11-Apr-2014 1 Initial release. 2 Updated: Table 73: Package thermal characteristics: remove Note 1.
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Revision history STM32F303x6/x8 Table 79. Document revision history (continued) Date 120/121 Downloaded from Arrow.com. Revision Changes 31-Aug-2017 6 Updated: Table 14: STM32F303x6/8 pin definitions Table 36: Low-power mode wakeup timings on page 65 Table 66: DAC characteristics Figure 7: WLCSP49 ballout Section 7: Package information Section 8: Part numbering to add the WLCSP49 package.
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STM32F303x6/x8 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.