Datasheet

DocID025083 Rev 7 99/121
STM32F303x6/x8 Electrical characteristics
101
VOH
SAT
High saturation voltage
(2)
R
load
= min,
Input at V
DDA
.
V
DDA
-100 -
mV
R
load
= 20K,
Input at V
DDA
.
V
DDA
-20 -
VOL
SAT
Low saturation voltage
R
load
= min,
input at 0 V
- - 100
R
load
= 20K,
input at 0 V.
--20
ϕm Phase margin - - 62 - °
t
OFFTRIM
Offset trim time: during calibration,
minimum time needed between two
steps to have 1 mV accuracy
---2ms
t
WAKEUP
Wakeup time from OFF state.
C
LOAD
≤ 50 pf,
R
LOAD
≥ 4 kΩ,
Follower
configuration
-2.85µs
t
S_OPAM_VOUT
ADC sampling time when reading the OPAMP output 400 - - ns
PGA gain Non inverting gain value -
-2--
-4--
-8--
-16--
R
network
R2/R1 internal resistance values in
PGA mode
(3)
Gain=2 - 5.4/5.4 -
kΩ
Gain=4 - 16.2/5.4 -
Gain=8 - 37.8/5.4 -
Gain=16 - 40.5/2.7 -
PGA gain
error
PGA gain error - -1% - 1% -
I
bias
OPAMP input bias current - - - ±0.2
(4)
µA
PGA BW
PGA bandwidth for different non
inverting gain
PGA Gain = 2,
C
load
= 50pF,
R
load
= 4 KΩ
-4-
MHz
PGA Gain = 4,
C
load
= 50pF,
R
load
= 4 KΩ
-2-
PGA Gain = 8,
C
load
= 50pF,
R
load
= 4 KΩ
-1-
PGA Gain = 16,
C
load
= 50pF,
R
load
= 4 KΩ
-0.5-
Table 68. Operational amplifier characteristics
(1)
(continued)
Symbol Parameter Condition Min. Typ. Max. Unit
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