Datasheet

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STM32F303x6/x8 Electrical characteristics
101
Figure 31. 12-bit buffered /non-buffered DAC
1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external
loads directly without the use of an external operational amplifier. The buffer can be bypassed by
configuring the BOFFx bit in the DAC_CR register.
6.3.20 Comparator characteristics
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Table 67. Comparator characteristics
(1)
Symbol Parameter Conditions Min. Typ. Max. Unit
V
DDA
Analog supply voltage - 2 - 3.6 V
V
IN
Comparator input voltage
range
-0-V
DDA
-
V
BG
Scaler input voltage - - V
REFINIT
--
V
SC
Scaler offset voltage - - ±5 ±10 mV
t
S_SC
V
REFINT
scaler startup time
from power down
First V
REFINT
scaler activation
after device power on
--1
(2)
s
Next activations - - 0.2 ms
t
START
Comparator startup time
V
DDA
≥ 2.7 V - - 4
µs
V
DDA
< 2.7 V - - 10
t
D
Propagation delay for
200 mV step with 100 mV
overdrive
V
DDA
≥ 2.7 V - 25 28
ns
V
DDA
< 2.7 V - 28 30
Propagation delay for full
range step with 100 mV
overdrive
V
DDA
≥ 2.7 V - 32 35
V
DDA
< 2.7 V - 35 40
V
OFFSET
Comparator offset error
V
DDA
≥ 2.7 V - ±5 ±10
mV
V
DDA
< 2.7 V - - ±25
TV
OFFSET
Total offset variation Full temperature range - - 3 mV
I
DD(COMP)
COMP current
consumption
- - 400 600 µA
1. Guaranteed by design, not tested in production.
2. For more details and conditions see Figure 32: Maximum VREFINT scaler startup time from power-down.
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