Datasheet
Functional overview STM32F303xB STM32F303xC
16/149 DS9118 Rev 14
3.7 Power management
3.7.1 Power supply schemes
• V
SS
, V
DD
= 2.0 to 3.6 V: external power supply for I/Os and the internal regulator. It is
provided externally through V
DD
pins.
• V
SSA
, V
DDA
= 2.0 to 3.6 V: external analog power supply for ADC, DACs, comparators
operational amplifiers, reset blocks, RCs and PLL. The minimum voltage to be applied
to V
DDA
differs from one analog peripheral to another. Table 3 provides the summary of
the V
DDA
ranges for analog peripherals. The V
DDA
voltage level must be always
greater or equal to the V
DD
voltage level and must be provided first.
• V
BAT
= 1.65 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and
backup registers (through power switch) when V
DD
is not present.
3.7.2 Power supply supervision
The device has an integrated power-on reset (POR) and power-down reset (PDR) circuits.
They are always active, and ensure proper operation above a threshold of 2 V. The device
remains in reset mode when the monitored supply voltage
is below a specified threshold,
V
POR/PDR, without the need for an external reset circuit.
• The POR monitors only the V
DD
supply voltage. During the startup phase it is required
that V
DDA
should arrive first and be greater than or equal to V
DD
.
• The PDR monitors both the V
DD
and V
DDA
supply voltages, however the V
DDA
power
supply supervisor can be disabled (by programming a dedicated Option bit) to reduce
the power consumption if the application design ensures that V
DDA
is higher than or
equal to V
DD
.
The device features an embedded programmable voltage detector (PVD) that monitors the
V
DD
power supply and compares it to the VPVD threshold. An interrupt can be generated
when V
DD
drops below the V
PVD
threshold and/or when V
DD
is higher than the V
PVD
threshold. The interrupt service routine can then generate a warning message and/or put
the MCU into a safe state. The PVD is enabled by software.
3.7.3 Voltage regulator
The regulator has three operation modes: main (MR), low-power (LPR), and power-down.
• The MR mode is used in the nominal regulation mode (Run)
• The LPR mode is used in Stop mode.
• The power-down mode is used in Standby mode: the regulator output is in high
impedance, and the kernel circuitry is powered down thus inducing zero consumption.
The voltage regulator is always enabled after reset. It is disabled in Standby mode.
Table 3. External analog supply values for analog peripherals
Analog peripheral Minimum V
DDA
supply Maximum V
DDA
supply
ADC / COMP 2.0 V 3.6 V
DAC / OPAMP 2.4 V 3.6V
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