Datasheet

DocID025147 Rev 7 89/138
STM32F302x6 STM32F302x8 Electrical characteristics
117
Output driving current
The GPIOs (general purpose input/outputs) can sink or source up to +/-8 mA, and sink or
source up to +/- 20
mA (with a relaxed V
OL/
V
OH
).
In the user application, the number of I/O pins which can drive current must be limited to
respect the absolute maximum rating specified in
Section 6.2:
• The sum of the currents sourced by all the I/Os on V
DD,
plus the maximum Run
consumption of the MCU sourced on V
DD,
cannot exceed the absolute maximum rating
Σ
I
VDD
(see Table 21).
• The sum of the currents sunk by all the I/Os on V
SS
plus the maximum Run
consumption of the MCU sunk on V
SS
cannot exceed the absolute maximum rating
Σ
I
VSS
(see Table 21).
Output voltage levels
Unless otherwise specified, the parameters given in Table 54 are derived from tests
performed under ambient temperature and V
DD
supply voltage conditions summarized in
Table 23. All I/Os (FT, TTa and TC unless otherwise specified) are CMOS and TTL
compliant.
Table 54. Output voltage characteristics
Symbol Parameter Conditions Min Max Unit
V
OL
(1)
Output low level voltage for an I/O pin CMOS port
(2)
I
IO
= +8 mA
2.7 V < V
DD
< 3.6 V
-0.4
V
V
OH
(3)
Output high level voltage for an I/O pin V
DD
–0.4 -
V
OL
(1)
Output low level voltage for an I/O pin TTL port
(2)
I
IO
= +8 mA
2.7 V < V
DD
< 3.6 V
-0.4
V
OH
(3)
Output high level voltage for an I/O pin 2.4 -
V
OL
(1)(4)
Output low level voltage for an I/O pin
I
IO
= +20 mA
2.7 V < V
DD
< 3.6 V
-1.3
V
OH
(3)(4)
Output high level voltage for an I/O pin V
DD
–1.3 -
V
OL
(1)(4)
Output low level voltage for an I/O pin
I
IO
= +6 mA
2 V < V
DD
< 2.7 V
-0.4
V
OH
(3)(4)
Output high level voltage for an I/O pin V
DD
–0.4 -
V
OLFM+
(1)(4)
Output low level voltage for an FTf I/O pin in
FM+ mode
I
IO
= +20 mA
2.7 V < V
DD
< 3.6 V
-0.4
1. The I
IO
current sunk by the device must always respect the absolute maximum rating specified in Table 21 and the sum of
I
IO
(I/O ports and control pins) must not exceed ΣI
IO(PIN)
.
2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
3. The I
IO
current sourced by the device must always respect the absolute maximum rating specified in Table 21 and the sum
of I
IO
(I/O ports and control pins) must not exceed ΣI
IO(PIN)
.
4. Data based on design simulation.
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