Datasheet

DocID025147 Rev 7 85/138
STM32F302x6 STM32F302x8 Electrical characteristics
117
Static latch-up
Two complementary static tests are required on six parts to assess the latch-up
performance:
• A supply overvoltage is applied to each power supply pin
• A current injection is applied to each input, output and configurable I/O pin
These tests are compliant with EIA/JESD 78A IC latch-up standard.
6.3.13 I/O current injection characteristics
As a general rule, current injection to the I/O pins, due to external voltage below V
SS
or
above V
DD
(for standard, 3 V-capable I/O pins) should be avoided during normal product
operation. However, in order to give an indication of the robustness of the microcontroller in
cases when abnormal injection accidentally happens, susceptibility tests are performed on a
sample basis during device characterization.
Functional susceptibility to I/O current injection
While a simple application is executed on the device, the device is stressed by injecting
current into the I/O pins programmed in floating input mode. While current is injected into
the I/O pin, one at a time, the device is checked for functional failures.
The failure is indicated by an out of range parameter: ADC error above a certain limit (higher
than 5 LSB TUE), out of conventional limits of induced leakage current on adjacent pins (out
of –5 µA/+0 µA range), or other functional failure (for example reset occurrence or oscillator
frequency deviation).
The test results are given in Table 52
Table 51. Electrical sensitivities
Symbol Parameter Conditions Class
LU Static latch-up class T
A
= +105 °C conforming to JESD78A 2 level A
Table 52. I/O current injection susceptibility
Symbol Description
Functional susceptibility
Unit
Negative
injection
Positive
injection
I
INJ
Injected current on BOOT0 -0 NA
(1)
1. Injection is not possible.
mA
Injected current on PC0 pin (TTa pin) -0 +5
Injected current PC0, PC1, PC2, PC3, PA0, PA1, PA2,
PA3, PA4, PA6, PA7, PC4, PB0, PB10, PB11, PB13 with
induced leakage current on other pins from this group
less than -100 µA or more than +100 µA
-5 +5
Injected current on any other TT, FT and FTf pins -5 NA
(1)
Injected current on all other TC, TTa and RESET pins -5 +5
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