Datasheet

DocID025147 Rev 7 23/138
STM32F302x6 STM32F302x8 Functional overview
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3.15.1 Advanced timer (TIM1)
The advanced-control timer can each be seen as a three-phase PWM multiplexed on 6
channels. They have complementary PWM outputs with programmable inserted dead-
times. They can also be seen as complete general-purpose timers. The 4 independent
channels can be used for:
• Input capture
• Output compare
• PWM generation (edge or center-aligned modes) with full modulation capability (0-
100%)
• One-pulse mode output
In debug mode, the advanced-control timer counter can be frozen and the PWM outputs
disabled to turn off any power switches driven by these outputs.
Many features are shared with those of the general-purpose TIM timers (described in
Section 3.15.2 using the same architecture, so the advanced-control timers can work
together with the TIM timers via the Timer Link feature for synchronization or event chaining.
3.15.2 General-purpose timers (TIM2, TIM15, TIM16, TIM17)
There are up to four synchronizable general-purpose timers embedded in the
STM32F302x6/8 devices (see
Table 5 for differences). Each general-purpose timer can be
used to generate PWM outputs, or act as a simple time base.
TIM2
TIM2 has a 32-bit auto-reload up/downcounter and 32-bit prescaler
It features 4 independent channels for input capture/output compare, PWM or one-pulse
mode output. It can work together, or with the other general-purpose timers via the Timer
Link feature for synchronization or event chaining.
The counter can be frozen in debug mode.
It has independent DMA request generation and supports quadrature encoders.
TIM15, TIM16 and TIM 17
These three timers general-purpose timers with mid-range features:
They have 16-bit auto-reload upcounters and 16-bit prescalers.
• TIM15 has 2 channels and 1 complementary channel
• TIM16 and TIM17 have 1 channel and 1 complementary channel
All channels can be used for input capture/output compare, PWM or one-pulse mode
output.
The timers can work together via the Timer Link feature for synchronization or event
chaining. The timers have independent DMA request generation.
The counters can be frozen in debug mode.
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