Datasheet

Electrical characteristics STM32F20xxx
128/184 DS6329 Rev 16
General PCB design guidelines
Power supply decoupling must be performed as shown in Figure 54 or Figure 55, depending
on whether V
REF+
is connected to V
DDA
or not. The 10 nF capacitors must be ceramic (good
quality), placed as close as possible to the chip.
Figure 54. Power supply and reference decoupling (V
REF+
not connected to V
DDA
)
1. V
REF+
and V
REF–
inputs are both available on UFBGA176 package. V
REF+
is also available on all packages
except for LQFP64. When V
REF+
and V
REF–
are not available, they are internally connected to V
DDA
and
V
SSA
.
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