Datasheet

DocID15274 Rev 10 47/108
STM32F105xx, STM32F107xx Electrical characteristics
107
5.3.6 External clock source characteristics
High-speed external user clock generated from an external source
The characteristics given in Table 20 result from tests performed using an high-speed
external clock source, and under ambient temperature and supply voltage conditions
summarized in Table 9.
APB2 (up to 72 MHz)
APB2-Bridge 3.47
µA/MHz
GPIOA 6.39
GPIOB 6.39
GPIOC 6.11
GPIOD 6.39
GPIOE 6.11
SPI1 3.61
USART1 12.08
TIM1 23.47
ADC1
(4)
18.21
1. The BusMatrix is automatically active when at least one master is ON.(CPU, ETH-MAC, DMA1 or DMA2).
2. When I2S is enabled we have a consumption add equal to 0, 02 mA.
3. When DAC_OUT1 or DAC_OUT2 is enabled we have a consumption add equal to 0, 3 mA.
4. Specific conditions for measuring ADC current consumption: f
HCLK
= 56 MHz, f
APB1
= f
HCLK
/2, f
APB2
=
f
HCLK
, f
ADCCLK
= f
APB2
/4. When ADON bit in the ADC_CR2 register is set to 1, a current consumption of
analog part equal to 0.6 mA must be added.
Table 19. Peripheral current consumption (continued)
Peripheral Typical consumption at 25 °C
Unit
Table 20. High-speed external user clock characteristics
Symbol Parameter Conditions Min Typ Max Unit
f
HSE_ext
External user clock source
frequency
(1)
-
1850MHz
V
HSEH
OSC_IN input pin high level voltage 0.7V
DD
- V
DD
V
V
HSEL
OSC_IN input pin low level voltage V
SS
- 0.3V
DD
t
w(HSE)
t
w(HSE)
OSC_IN high or low time
(1)
1. Guaranteed by design, not tested in production.
5 - -
ns
t
r(HSE)
t
f(HSE)
OSC_IN rise or fall time
(1)
- - 20
C
in(HSE)
OSC_IN input capacitance
(1)
- - 5 - pF
DuCy
(HSE)
Duty cycle - 45 - 55 %
I
L
OSC_IN Input leakage current V
SS
≤V
IN
≤V
DD
- - ±1 µA
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