Datasheet

DocID15274 Rev 10 31/108
STM32F105xx, STM32F107xx Pinouts and pin description
107
A8 50 77 PA15 I/O FT JTDI SPI3_NSS / I2S3_WS
TIM2_CH1_ETR / PA15
SPI1_NSS
B9 51 78
PC10 I/O FT PC10 UART4_TX
USART3_TX/
SPI3_SCK/I2S3_CK
B8 52 79
PC11 I/O FT PC11 UART4_RX
USART3_RX/
SPI3_MISO
C8 53 80
PC12 I/O FT PC12 UART5_TX
USART3_CK/
SPI3_MOSI/I2S3_SD
D8 - 81 PD0 I/O FT PD0 - OSC_IN
(9)
/ CAN1_RX
E8 - 82 PD1 I/O FT PD1 - OSC_OUT
(9)
/ CAN1_TX
B7 54 83 PD2 I/O FT PD2 TIM3_ETR / UART5_RX
C7 - 84 PD3 I/O FT PD3 - USART2_CTS
D7 - 85 PD4 I/O FT PD4 - USART2_RTS
B6 - 86 PD5 I/O FT PD5 - USART2_TX
C6 - 87
PD6 I/O FT PD6 - USART2_RX
D6 - 88 PD7 I/O FT PD7 - USART2_CK
A7 55 89
PB3 I/O FT JTDO SPI3_SCK / I2S3_CK
PB3 / TRACESWO/
TIM2_CH2 / SPI1_SCK
A6 56 90
PB4 I/O FT NJTRST SPI3_MISO
PB4 /
TIM3_CH1/
SPI1_MISO
C5 57 91 PB5 I/O - PB5
I2C1_ SMBA / SPI3_MOSI /
ETH_MII_PPS_OUT / I2S3_SD
ETH_RMII_PPS_OUT
TIM3_CH2/SPI1_MOSI/
CAN2_RX
B5 58 92 PB6 I/O FT PB6 I2C1_SCL
(7)
/TIM4_CH1
(7)
USART1_TX/CAN2_TX
A5 59 93 PB7 I/O FT PB7 I2C1_SDA
(7)
/TIM4_CH2
(7)
USART1_RX
D5 60 94 BOOT0 I - BOOT0 - -
B4 61 95 PB8 I/O FT PB8 TIM4_CH3
(7)
/ ETH_MII_TXD3 I2C1_SCL/CAN1_RX
A4 62 96 PB9 I/O FT PB9 TIM4_CH4
(7)
I2C1_SDA / CAN1_TX
D4 - 97 PE0 I/O FT PE0 TIM4_ETR -
C4 - 98 PE1 I/O FT PE1 - -
E5 63 99 V
SS_3
S - V
SS_3
- -
F5 64 100 V
DD_3
S - V
DD_3
- -
Table 5. Pin definitions (continued)
Pins
Pin name
Type
(1)
I / O Level
(2)
Main
function
(3)
(after reset)
Alternate functions
(4)
BGA100
LQFP64
LQFP100
Default Remap
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