Datasheet

Revision history STM32F105xx, STM32F107xx
106/108 DocID15274 Rev 10
11-May-2010 5
Added BGA package.
Table 5: Pin definitions:
ETH_RMII_RXD0 and ETH_RMII_RXD1 added in remap column for
PD9 and PD10, respectively.
Note added to ETH_MII_RX_DV, ETH_MII_RXD0, ETH_MII_RXD1,
ETH_MII_RXD2 and ETH_MII_RXD3
Updated Table 36: I/O static characteristics on page 57
Added Figure 18: Standard I/O input characteristics - CMOS port
to Figure 21: 5 V tolerant I/O input characteristics - TTL port
Updated Table 43: SPI characteristics on page 66.
Updated Table 44: I2S characteristics on page 69.
Updated Table 48: Ethernet DC electrical characteristics on page 72.
Updated Table 49: Dynamic characteristics: Ethernet MAC signals
for SMI on page 72.
Updated Table 50: Dynamic characteristics: Ethernet MAC signals
for RMII on page 73
Updated Figure 59: USB O44TG FS + Ethernet solution on
page 100.
Updated Figure 60: USB OTG FS + I2S (Audio) solution on
page 100
01-Aug-2011 6
Changed SRAM size to 64 KB on all parts.
Updated PD0 and PD1 description in Table 5: Pin definitions on
page 27
Updated footnotes below Table 6: Voltage characteristics on page 36
and Table 7: Current characteristics on page 36
Updated tw min in Table 20: High-speed external user clock
characteristics on page 47
Updated startup time in Table 23: LSE oscillator characteristics (fLSE
= 32.768 kHz) on page 50
Added Section 5.3.12: I/O current injection characteristics on
page 56
Updated Table 36: I/O static characteristics on page 57
Add Interna code V to Table 62: Ordering information scheme on
page 94
06-Mar-2014 7
Added a “Packing” entry to Table 62: Ordering information scheme
including “Blank = tray” and “TR = Tape and reel”.
Referenced 4 Figures: Figure 41, Figure 49, Figure 59 and
Figure 60.
Updated the “Package” line with “BGA100” in Table 2 :
STM32F105xx and STM32F107xx features and peripheral counts.
Table 65. Document revision history (continued)
Date Revision Changes
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