Datasheet

Electrical characteristics STM32F103xF, STM32F103xG
78/136 DocID16554 Rev 4
Figure 29. Synchronous non-multiplexed PSRAM write timings
1. C
L
= 15 pF.
Table 39. Synchronous non-multiplexed PSRAM write timings
(1)
Symbol Parameter Min Max Unit
t
w(CLK)
FSMC_CLK period 27.6 - ns
t
d(CLKL-NExL)
FSMC_CLK low to FSMC_NEx low (x = 0...2) - 0.5 ns
t
d(CLKL-NExH)
FSMC_CLK low to FSMC_NEx high (x = 0...2) 1.5 - ns
t
d(CLKL-NADVL)
FSMC_CLK low to FSMC_NADV low - 1 ns
t
d(CLKL-NADVH)
FSMC_CLK low to FSMC_NADV high 0.5 - ns
t
d(CLKL-AV)
FSMC_CLK low to FSMC_Ax valid (x = 16...25) - 0 ns
t
d(CLKL-AIV)
FSMC_CLK low to FSMC_Ax invalid (x = 16...25) 1.5 - ns
t
d(CLKL-NWEL)
FSMC_CLK low to FSMC_NWE low - 1 ns
t
d(CLKL-NWEH)
FSMC_CLK low to FSMC_NWE high 1.5 - ns
t
d(CLKL-Data)
FSMC_D[15:0] valid data after FSMC_CLK low - 2.5 ns
t
d(CLKL-NBLH)
FSMC_CLK low to FSMC_NBL high 0.5 - ns
t
su(NWAITV-CLKH)
FSMC_NWAIT valid before FSMC_CLK high 7 - ns
t
h(CLKH-NWAITV)
FSMC_NWAIT valid after FSMC_CLK high 2 - ns
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