Datasheet

Electrical characteristics STM32F103xF, STM32F103xG
72/136 DocID16554 Rev 4
Synchronous waveforms and timings
Figure 26 through Figure 29 represent synchronous waveforms and Table 37 through
Table 39 provide the corresponding timings. The results shown in these tables are obtained
with the following FSMC configuration:
• BurstAccessMode = FSMC_BurstAccessMode_Enable;
• MemoryType = FSMC_MemoryType_CRAM;
• WriteBurst = FSMC_WriteBurst_Enable;
• CLKDivision = 1; (0 is not supported, see the STM32F10xxx reference manual)
• DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM
t
h(A_NWE)
Address hold time after FSMC_NWE high 4t
HCLK
– 2 - ns
t
v(BL_NE)
FSMC_NEx low to FSMC_BL valid - 0.5 ns
t
h(BL_NWE)
FSMC_BL hold time after FSMC_NWE high t
HCLK
– 1.5 - ns
t
v(Data_NADV)
FSMC_NADV high to Data valid - t
HCLK
+ 6 ns
t
h(Data_NWE)
Data hold time after FSMC_NWE high t
HCLK
– 0.5 - ns
1. C
L
= 15 pF.
Table 35. Asynchronous multiplexed PSRAM/NOR write timings
(1)
Symbol Parameter Min Max Unit
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