Datasheet

DS5792 Rev 13 7/143
STM32F103xC, STM32F103xD, STM32F103xE List of figures
8
List of figures
Figure 1. STM32F103xC, STM32F103xD and STM32F103xE performance line block diagram . . . 12
Figure 2. Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 3. STM32F103xC/D/E BGA144 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 4. STM32F103xC/D/E performance line BGA100 ballout. . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 5. STM32F103xC/D/E performance line LQFP144 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 6. STM32F103xC/D/E performance line LQFP100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 7. STM32F103xC/D/E performance line LQFP64 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 8. STM32F103xC/D/E performance line
WLCSP64 ballout, ball side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 9. Memory map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 10. Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 11. Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 12. Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 13. Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 14. Typical current consumption in Run mode versus frequency (at 3.6 V) -
code with data processing running from RAM, peripherals enabled . . . . . . . . . . . . . . . . . 48
Figure 15. Typical current consumption in Run mode versus frequency (at 3.6 V)-
code with data processing running from RAM, peripherals disabled . . . . . . . . . . . . . . . . 48
Figure 16. Typical current consumption on V
BAT
with RTC on vs. temperature
at different V
BAT
values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Figure 17. Typical current consumption in Stop mode with regulator in run mode
versus temperature at different V
DD
values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Figure 18. Typical current consumption in Stop mode with regulator in low-power
mode versus temperature at different V
DD
values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 19. Typical current consumption in Standby mode versus temperature at
different V
DD
values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 20. High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Figure 21. Low-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Figure 22. Typical application with an 8 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 23. Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Figure 24. Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms . . . . . . . . . . . . . . . 66
Figure 25. Asynchronous non-multiplexed SRAM/PSRAM/NOR write waveforms . . . . . . . . . . . . . . . 67
Figure 26. Asynchronous multiplexed PSRAM/NOR read waveforms. . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 27. Asynchronous multiplexed PSRAM/NOR write waveforms . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 28. Synchronous multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Figure 29. Synchronous multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 30. Synchronous non-multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . 75
Figure 31. Synchronous non-multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Figure 32. PC Card/CompactFlash controller waveforms for common memory read access . . . . . . . 77
Figure 33. PC Card/CompactFlash controller waveforms for common memory write access . . . . . . . 78
Figure 34. PC Card/CompactFlash controller waveforms for attribute memory read
access. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Figure 35. PC Card/CompactFlash controller waveforms for attribute memory write
access. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Figure 36. PC Card/CompactFlash controller waveforms for I/O space read access . . . . . . . . . . . . . 80
Figure 37. PC Card/CompactFlash controller waveforms for I/O space write access . . . . . . . . . . . . . 81
Figure 38. NAND controller waveforms for read access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 39. NAND controller waveforms for write access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84