Datasheet

Revision history STM32F103x8, STM32F103xB
80/84
18-Oct-2007 3
STM32F103CBT6, STM32F103T6 and STM32F103T8 root part
numbers added (see Table 2: STM32F103xx medium-density device
features and peripheral counts)
VFQFPN36 package added (see Section 6: Package characteristics).
All packages are ECOPACK® compliant. Package mechanical data
inch values are calculated from mm and rounded to 4 decimal digits
(see Section 6: Package characteristics).
Table 4: Medium-density STM32F103xx pin definitions updated and
clarified.
Table 25: Low-power mode wakeup timings updated.
T
A
min corrected in Table 11: Embedded internal reference voltage.
Note 2 added below Table 21: HSE 4-16 MHz oscillator characteristics.
V
ESD(CDM)
value added to Table 31: ESD absolute maximum ratings.
Note 3 added and V
OH
parameter description modified in Table 34:
Output voltage characteristics.
Note 1 modified under Table 35: I/O AC characteristics.
Equation 1 and Table 45: RAIN max for fADC = 14 MHz added to
Section 5.3.17: 12-bit ADC characteristics.
V
AIN
, t
S
max, t
CONV
, V
REF+
min and t
lat
max modified, notes modified
and t
latr
added in Table 44: ADC characteristics.
Figure 29: ADC accuracy characteristics updated. Note 1 modified
below Figure 30: Typical connection diagram using the ADC.
Electrostatic discharge (ESD) on page 51 modified.
Number of TIM4 channels modified in Figure 1: STM32F103xx
performance line block diagram.
Maximum current consumption Tab l e 1 2, Tab le 13 and Table 14
updated. V
hys
modified in Table 33: I/O static characteristics.
Table 47: ADC accuracy updated. t
VDD
modified in Table 9: Operating
conditions at power-up / power-down. V
FESD
value added in Tabl e 2 9 :
EMS characteristics.
Values corrected, note 2 modified and note 3 removed in Table 25:
Low-power mode wakeup timings.
Table 15: Typical and maximum current consumptions in Stop and
Standby modes: Typical values added for V
DD
/V
BAT
= 2.4 V, Note 2
modified, Note 2 added.
Table 21: Typical current consumption in Standby mode added. On-chip
peripheral current consumption on page 42 added.
ACC
HSI
values updated in Table 23: HSI oscillator characteristics.
V
prog
added to Table 27: Flash memory characteristics.
Upper option byte address modified in Figure 8: Memory map.
Typical f
LSI
value added in Table 24: LSI oscillator characteristics and
internal RC value corrected from 32 to 40 kHz in entire document.
T
S_temp
added to Table 48: TS characteristics. N
END
modified in
Table 28: Flash memory endurance and data retention.
T
S_vrefint
added to Table 11: Embedded internal reference voltage.
Handling of unused pins specified in General input/output
characteristics on page 52. All I/Os are CMOS and TTL compliant.
Figure 31: Power supply and reference decoupling (VREF+ not
connected to VDDA) modified.
t
JITTER
and f
VCO
removed from Table 26: PLL characteristics.
Appendix A: Important notes on page 81 added.
Added Figure 13, Figure 14, Figure 15 and Figure 17.
Table 56. Document revision history (continued)
Date Revision Changes