Datasheet

Electrical characteristics STM32F103x8, STM32F103xB
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5.3.12 I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in Ta ble 3 3 are derived from tests
performed under the conditions summarized in Table 8. All I/Os are CMOS and TTL
compliant.
All I/Os are CMOS and TTL compliant (no software configuration required), their
characteristics consider the most strict CMOS-technology or TTL parameters:
● For V
IH
:
–if V
DD
is in the [2.00 V - 3.08 V] range: CMOS characteristics but TTL included
–if V
DD
is in the [3.08 V - 3.60 V] range: TTL characteristics but CMOS included
● For V
IL
:
–if V
DD
is in the [2.00 V - 2.28 V] range: TTL characteristics but CMOS included
–if V
DD
is in the [2.28 V - 3.60 V] range: CMOS characteristics but TTL included
Table 33. I/O static characteristics
Symbol Parameter Conditions Min Typ Max Unit
V
IL
Input low level voltage
TTL ports
–0.5 0.8
V
V
IH
Standard IO input high level
voltage
2V
DD
+0.5
IO FT
(1)
input high level voltage
1. FT = Five-volt tolerant.
25.5V
V
IL
Input low level voltage
CMOS ports
–0.5 0.35 V
DD
V
V
IH
Input high level voltage 0.65 V
DD
V
DD
+0.5
V
hys
Standard IO Schmitt trigger
voltage hysteresis
(2)
2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization, not tested in
production.
200 mV
IO FT Schmitt trigger voltage
hysteresis
(2)
5% V
DD
(3)
3. With a minimum of 100 mV.
mV
I
lkg
Input leakage current
(4)
4. Leakage could be higher than max. if negative current is injected on adjacent pins.
V
SS
≤V
IN
≤V
DD
Standard I/Os
±1
µA
V
IN
= 5 V
I/O FT
3
R
PU
Weak pull-up equivalent
resistor
(5)
5. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable
PMOS/NMOS. This MOS/NMOS contribution
to the series resistance is minimum (~10% order).
V
IN
= V
SS
30 40 50 kΩ
R
PD
Weak pull-down equivalent
resistor
(5)
V
IN
= V
DD
30 40 50 kΩ
C
IO
I/O pin capacitance 5 pF